參數(shù)資料
型號(hào): Z80B-PIO
英文描述: Z8 Microcontrollers
中文描述: Z8微控制器
文件頁(yè)數(shù): 74/222頁(yè)
文件大?。?/td> 1595K
代理商: Z80B-PIO
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Z8 Microcontrollers
I/O Ports
ZiLOG
5-28
UM001600-Z8X0599
5.8.3 COMPARATOR OPERATION
After enabling the Analog Comparator mode, P33 be-
comes a common reference input for both comparators.
The P33 (Ref) is hard wired to the reference inputs to both
comparators and cannot be separated. P31 and P32 are
always connected to the positive inputs to the compara-
tors. P31 is the positive input to comparator AN1 while P32
is the positive input to comparator AN2. The outputs to
comparators AN1 and AN2 are AN1-out and AN2-out, re-
spectively.
The comparator output reflects the relationship between
the positive input to the reference input.
Example: If the voltage on AN1 is higher than the voltage
on Ref then AN1-out will be at a high state. If voltage on
AN2 is lower than the voltage on Ref then AN2-out will be
at a Low state. In this example, when the Port 3 register is
read, Bits D1 = 1 and D2 = 0. If the comparator outputs are
enabled to come out on P34 and P37, then P34 = 1 and
P37 = 0. Please note that the previous data stored in P34
and P37 is not disturbed. Once the comparator outputs are
de-selected the stored values in the P34 and P37 register
bits will be reflected on these pins again.
5.8.4 Interrupts
In the example from Section 5.8.3, P32 (AN2) will generate
an interrupt based on the result of the comparison being
low and the Interrupt Request Register (IRQ FAH) having
bits D7=0 and D6=0. If IRQ D7=1 and D6=0 then both P31
and P32 would generate interrupts.
5.8.5 Comparator Definitions
5.8.5.1 V
ICR
The usable voltage range for both positive inputs and the
reference input is called the common mode voltage range
(V
ICR
). The comparator is not guaranteed to work if the in-
puts are outside of the V
ICR
range.
5.8.5.2 V
OFFSET
The absolute value of the voltage between the positive in-
put and the reference input required to make the compar-
ator output voltage switch is the input offset voltage (V
). If AN1 is 3.000V and Ref is 3.001V when the
comparator output switches states then the Voffset = 1mV.
5.8.5.3 I
IO
For CMOS voltage comparator inputs, the input offset cur-
rent (I
IO
) is the leakage current of the CMOS input gate.
5.8.6 RUN Mode
P33 is not available as an interrupt input during Analog
Mode. P31 and P32 are valid interrupt inputs in conjunc-
tion with P33 (Ref) when in the Analog Mode.
P31 can still be used as T
IN
when the analog mode is se-
lected. If comparator outputs are desired to be outputted
on the Port 3 outputs, please refer to specific products
specification for priority of mixing when other special fea-
tures are sharing those same Port 3 pins.
5.8.7 HALT Mode
The analog comparators are functional during HALT Mode
if the Analog Mode has been enabled. P31 and P32, in
conjunction with P33 (Ref) will be able to generate inter-
rupts. Only P33 cannot generate an interrupt since the P33
input goes directly to the Ref input of the comparators and
is disconnected from the interrupt sensing circuits.
5.8.8 STOP Mode
The analog comparators are disabled during STOP Mode
so it does not use any current at that time. If P31, P32, or
P33 are used as a source for Stop-Mode Recovery, the
Port 3 Digital Mode must be selected by setting bit D1=0 in
the Port 3 Mode Register. Otherwise in STOP Mode, the
P31, P32, and P33 cannot be sensed. If the Analog Mode
was selected when entering STOP Mode, it will still be en-
abled after a valid SMR triggered reset.
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