Z8 Microcontrollers
Instruction Set
ZiLOG
12-6
UM001600-Z8X0599
12.4 NOTATION AND BINARY ENCODING
In the detailed instruction descriptions that make up the
rest of this chapter, operands and status flags are repre-
sented by a notational shorthand. Operands, condition
codes, address modes, and their notations are as follows
(Table 12-12):
Table 12-12. Notational Shorthand
Notation
Address Mode
Condition Code
Working Register
Register
or
Working Register
Register Pair
or
Working Register Pair
Indirect Working Register
Indirect Register
or
Indirect Working Register
Indirect Working Register
Pair
Indirect Register Pair
or
Working Register Pair
Indexed
Operand
Range *
See condition codes
n = 0 – 15
Reg. represents a number in the range of 00H to FFH
cc
r
R
Rn
Reg
Rn
Reg
n = 0 – 15
Reg. represents an even number in the range of 00H to FEH
RR
RRp
@Rn
@Reg
p = 0, 2, 4, 6, 8, 10, 12, or 14
n = 0 –15
Reg. represents a number in the range of 00H to FFH
Ir
IR
@Rn
@RRp
n = 0– 15
p = 0, 2, 4, 6, 8, 10, 12, or 14
Irr
IRR
@Reg
Reg. represents an even number in the range 00H to FFH
@RRp
Reg (Rn)
p = 0, 2, 4, 6, 8, 10, 12, or 14
Reg. represents a number in the range of 00H to FFH and n =
0 – 15
Addrs. represents a number in the range of 00H to FFH
Addrs. represents a number in the range of +127 to –128
which is an offset relative to the address of the next instruction
Data is a number between 00H to FFH
X
DA
RA
Direct Address
Relative Address
Addrs
Addrs
IM
Immediate
#Data
*See the device product specification to determine the exact register file range available. The register file size varies by the device
type.