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參數(shù)資料
| 型號(hào)： | Z80B-PIO |
| 英文描述： | Z8 Microcontrollers |
| 中文描述： | Z8微控制器 |
| 文件頁數(shù)： | 22/222頁 |
| 文件大?。?/td> | 1595K |
| 代理商： | Z80B-PIO |
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Z8 Microcontrollers
Address Space
ZiLOG
2-2
UM001600-Z8X0599
2.2 Z8 MCU STANDARD REGISTER FILE
(Continued)
Registers can be accessed as either 8-bit or 16-bit
registers using Direct, Indirect, or Indexed Addressing. All
236 general-purpose registers can be referenced or
modified by any instruction that accesses an 8-bit register,
without the need for special instructions. Registers
accessed as 16 bits are treated as even-odd register pairs
(there are 118 valid pairs). In this case, the data’s Most
Significant Byte (MSB) is stored in the even numbered
register, while the Least Significant Byte (LSB) goes into
the next higher odd numbered register (Figure 2-1).
By using a logical instruction and a mask, individual bits
within registers can be accessed for bit set, bit clear, bit
complement, or bit test operations. For example, the in-
struction AND R15, MASK performs a bit clear operation.
Figure 2-2 shows this example.
When instructions are executed, registers are read when
defined as sources and written when defined as destina-
tions. All General-Purpose Registers function as accumu-
lators, address pointers, index registers, stack areas, or
scratch pad memory.
2.2.1 General-Purpose Registers
General-Purpose Registers (GPR) are undefined after the
device is powered up. The registers keep their last value
after any reset, as long as the reset occurs in the V
CC
volt-
age-specified operating range. It will not keep its last state
from a V
LV
reset if V
CC
drops below 1.8v.
Note:
Registers in Bank E0-EF may only be accessed
through the working register and indirect addressing
modes. Direct access cannot be used because the 4-bit
working register address mode already uses the format [E
| dst], where dst represents the working register number
from 0H to FH.
2.2.2 RAM Protect
The upper portion of the register file address space 80H to
EFH (excluding the control registers) may be protected
from reading and writing. The RAM Protect bit option is
mask-programmable and is selected by the customer
when the ROM code is submitted. After the mask option is
selected, the user activates this feature from the internal
ROM code to turn off/on the RAM Protect by loading either
a 0 or 1 into the IMR register, bit D6. A 1 in D6 enables
RAM Protect. Only devices that use registers 80H to EFH
offer this feature.
2.2.3 Working Register Groups
Z8 instructions can access 8-bit registers and register
pairs (16-bit words) using either 4-bit or 8-bit address
fields. 8-bit address fields refer to the actual address of the
register. For example, Register 58H is accessed by calling
upon its 8-bit binary equivalent, 01011000 (58H).
With 4-bit addressing, the register file is logically divided
into 16 Working Register Groups of 16 registers each, as
shown in Table 2-2. These 16 registers are known as
Working Registers. A Register Pointer (one of the control
registers, FDH) contains the base address of the active
Working Register Group. The high nibble of the Register
Pointer determines the current Working Register Group.
When accessing one of the Working Registers, the 4-bit
address of the Working Register is combined within the up-
per four bits (high nibble) of the Register Pointer, thus
forming the 8-bit actual address. Figure 2-3 illustrates this
operation. Since working registers are typically specified
by short format instructions, there are fewer bytes of code
needed, which reduces execution time. In addition, when
processing interrupts or changing tasks, the Register
Pointer speeds context switching. A special Set Register
Pointer (SRP) instruction sets the contents of the Register
Pointer.
Figure 2-1. 16-Bit Register Addressing
Figure 2-2. Accessing Individual Bits (Example)
MSB
LSB
Rn Rn+1
n = Even Address
0 1 0 1 0 0 0 0
R15
0 1 1 1 0 0 0 0
1 1 0 1 1 1 1 1
MASK
R15
AND R15, DFH ;Clear Bit 5 of Working Register 15
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