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XRT94L43
137
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
REV. 1.0.2
W25
GPIO_2
ExtLOS_2
SSI_POS
I/O
TTL/
CMOS
General Purpose Input/Output Pin or External LOS Input Pin/Slow-
Speed Interface -Ingress - Positive Data I/O:
The function of this input pin depends on whether or not Channel 2 of
the DS3/E3 Framer Block is enabled..
GPIO_2 (DS3/E3 Framer Block - Channel 2 is disabled).
If the DS3/E3 Framer Block is disabled, then this pin will function as a
General Purpose Input/Output pin. This input pin can be configured to
function as either an input or output pin by writing the appropriate value
into Bit 2 (GPIO_DIR_2), within the Operation General Purpose Input/
Output Direction Register - 0 (Indirect Address = 0x00, 0x4B), (Direct
Address = 0x014B).
When configured as an input pin, the state of this pin can be monitored
by reading the state of Bit 2 (GPIO_2) within the Operation General Pur-
pose Input/Output Register - Byte 0 (Indirect Address = 0x00, 047),
(Direct Address = 0x0147).
When configured as an output pin, the state of this pin can be controlled
by writing the appropriate value into Bit 2 (GPIO_2) within the Operation
General Purpose Input/Output Register - Byte 0 (Indirect Address =
0x00, 0x47), (Direct Address = 0x0147).
ExtLOS_2 (DS3/E3 Framer Block - Channel 2 is enabled, Slow-
Speed Interface is Disabled).
If the DS3/E3 Framer Block is enabled, then this pin will function as the
External LOS Input pin for Channel 2. This input pin is intended to be
connected to an LOS output pin of a DS3/E3 LIU IC.
If this input pin is pulled "High", then the corresponding DS3/E3 Framer
block will automatically declare an LOS condition.
SSI_POS (Slow-Speed Interface - Ingress Port is enabled):
If the Slow-Speed Interface - Ingress (SSI) Port is enabled, then this pin
will function as either the SSI_POS output pin or the SSI_POS input pin.
If the user configures the SSI port to operate in the "Insert" Mode, then
the SSI port will be configured to replace any "user-selected" Ingress
DS3/E3 or STS-1 data-stream (within the XRT94L43) with the data that
is applied to the SSI_POS and SSI_NEG input pins. More specifically, in
the "Insert" Mode, this pin will function as the SSI_POS input pin. In this
case, the SSI port will sample and latch the contents of this input pin
(along with SSI_NEG, in a Dual-Rail Manner) upon the falling edge of
the SSI_CLK input clock signal.
If the user configures the SSI port to operate in the "Extract" Mode, then
the SSI port will output any "user-selected" Ingress DS3/E3 or STS-1
signal (within the XRT94L43) via this output port. More specifically, in
the "Extract Mode", this pin will function as the SSI_POS output pin. In
this case, the SSI port will output data via this pin, along with the
SSI_NEG output pin (in a Dual-Rail Manner) upon the rising edge of the
SSI_CLK output signal.
GENERAL PURPOSE INPUT/OUTPUT
PIN #SIGNAL NAME
I/O
SIGNAL
TYPE
DESCRIPTION