
XRT94L43
319
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
REV. 1.0.2
NOTE: The values for t33 and t34 can be found in Table 25. 15.0 RECEIVE LINE DCC EXTRACTION OUTPUT PORT
15.1
Receive Line DCC Output Port
The Receive Line DCC output port provides a dedicated port for the user to extract out the Line DCC (e.g., D4
through D12) bytes from that within the incoming STS-12/STM-4 data-stream. The user should note that all of
the output signals (of this port) are updated upon the falling edge of RxTOHClk. The timing waveform and
information for the Receive Line DCC output port is presented below.
FIGURE 30. TIMING WAVEFORM OF THE RECEIVE SECTION DCC OUTPUT PORT
TABLE 25: TIMING INFORMATION FOR THE RECEIVE SECTION DCC OUTPUT PORT
SYMBOL
DESCRIPTION
MIN.
TYP.
MAX.
t33
Falling edge of RxTOHClk to rising edge of RxSDCCValid
0ns
0.5ns
t34
Falling edge of RxTOHClk to RxSDCC output delay
0.1ns
0.5ns
RxSDC C
RxTO HC lk
R xSDCCVal
t
33
t
34