參數(shù)資料
型號(hào): XRT86VX38IB329-F
廠商: Exar Corporation
文件頁(yè)數(shù): 27/61頁(yè)
文件大?。?/td> 0K
描述: IC TI/E1/J1 FRAMER/LIU 329FPBGA
標(biāo)準(zhǔn)包裝: 90
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 329-FBGA
供應(yīng)商設(shè)備封裝: 329-FPBGA(17x17)
包裝: 散裝
其它名稱: 1016-1439
XRT86VX38
30
REV. 1.0.3
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
RDY/DTACK
M16
L16
O
12
(Con’t)
Power PC 403 Mode - RDY Ready Output:
This output pin will function as the “active-high” READY
output.
During a READ or WRITE cycle, the Microprocessor Inter-
face block will toggle this output pin to the logic high level,
ONLY when the Microprocessor Interface is ready to com-
plete or terminate the current READ or WRITE cycle. Once
the Microprocessor has sampled this signal being at the
logic “high” level upon the rising edge of PCLK, then it is
now safe for it to move on and execute the next READ or
WRITE cycle.
If (during a READ or WRITE cycle) the Microprocessor
Interface block is holding this output pin at a logic “l(fā)ow”
level, then the Microprocessor is expected to extend this
READ or WRITE cycle, until it samples this output pin
being at the logic low level.
NOTE: The Microprocessor Interface will update the state
of this output pin upon the rising edge of PCLK.
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
N19
M17
M18
M15
L16
M19
L17
L19
K15
J16
K18
J15
H15
H19
H17
L13
L14
K15
L11
K13
K16
K14
J15
J14
J13
H14
H16
G16
F16
G11
I-
Microprocessor Interface Address Bus Input
These pins permit the Microprocessor to identify on-chip
registers and Buffer/Memory locations within the
XRT86VX38 device whenever it performs READ and
WRITE operations with the XRT86VX38 device.
NOTE: These pins are internally pulled “Low” with a 50k
resistor, except ADDR[8:14].
MICROPROCESSOR INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE (MA)
DESCRIPTION
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