- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1977 > XRT86VX38IB329-F (Exar Corporation)IC TI/E1/J1 FRAMER/LIU 329FPBGA PDF資料下載
參數(shù)資料
| 型號： | XRT86VX38IB329-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 11/61頁 |
| 文件大小： | 0K |
| 描述： | IC TI/E1/J1 FRAMER/LIU 329FPBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 控制器類型： | T1/E1/J1 調(diào)幀器，LIU |
| 電源電壓： | 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 329-FBGA |
| 供應(yīng)商設(shè)備封裝： | 329-FPBGA（17x17） |
| 包裝： | 散裝 |
| 其它名稱： | 1016-1439 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
XRT86VX38
16
REV. 1.0.3
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
TxMSYNC0/
TxINCLK0
TxMSYNC1/
TxINCLK1
TxMSYNC2/
TxINCLK2
TxMSYNC3/
TxINCLK3
TxMSYNC4/
TxINCLK4
TxMSYNC5/
TxINCLK5
TxMSYNC6/
TxINCLK6
TxMSYNC7/
TxINCLK7
B10
B14
C18
G16
U16
T13
R8
V6
D9
A12
C15
E14
P13
R11
R8
N6
I/O
12
Multiframe Sync Pulse (TxMSYNCn) / Transmit Input
Clock (TxINCLKn)
The exact function of these pins depends on the mode of
operation selected, as described below.
DS1/E1 Base Rate Mode (1.544MHz/2.048MHz) - TxM-
SYNCn
In this mode, these pins are used to indicate the multi-frame
boundary within an outbound DS1/E1 frame.
In DS1 ESF mode, TxMSYNCn repeats every 3ms.
In DS1 SF mode, TxMSYNCn repeats every 1.5ms.
In E1 mode, TxMSYNCn repeats every 2ms.
If TxMSYNCn is configured as an input, TxMSYNCn must
pulse "High" for one period of TxSERCLK during the first bit of
an outbound DS1/E1 multi-frame. It is imperative that the
TxMSYNC input signal be synchronized with the TxSERCLK
input signal.
If TxMSYNCn is configured as an output, the transmit section
of the T1/E1 framer will output and pulse TxMSYNC "High" for
one period of TxSERCLK during the first bit of an outbound
DS1/E1 frame.
DS1/E1 High-Speed Backplane Modes* - (TxINCLKn as
INPUT ONLY)
In this mode, this pin must be used as the high-speed input
clock pin (TxINCLKn) for the backplane interface to latch in
high-speed or multiplexed data on the TxSERn pin. The fre-
quency of TxINCLK is presented in the table below.
NOTES:
1.
*High-speed backplane modes include (For T1/E1)
2.048MVIP,
4.096MHz,
8.192MHz,
16.384MHz
HMVIP, H.100, Bit-multiplexed modes, and (For T1
only) 12.352MHz Bit-multiplexed mode.
2.
In DS1 high-speed modes, the DS-0 data is mapped
into an E1 frame by ignoring every fourth time slot
(don’t care).
3.
These 8 pins are internally pulled “Low” for each
channel.
TRANSMIT SYSTEM SIDE INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE(MA)
DESCRIPTION
OPERATION MODE
FREQUENCY OF
TXINCLK(MHZ)
2.048MVIP non-multiplexed
2.048
4.096MHz non-multiplexed
4.096
8.192MHz non-multiplexed
8.192
12.352MHz Bit-multiplexed
(DS1 ONLY)
12.352
16.384MHz Bit-multiplexed
16.384
16.384 HMVIP Byte-multiplexed
16.384
16.384 H.100 Byte-multiplexed
16.384
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT94L31IB-L | IC MAPPER DS3/E3/STS-1 504TBGA |
| XRT94L33IB-L | IC MAPPER DS3/E3/STS-1 504TBGA |
| XRT94L43IB-F | IC MAPPER SONET/SDH OC12 516BGA |
| XS1-G02B-FB144-I4 | IC MCU 32BIT 16KB OTP 144FBGA |
| XTR114U/2K5 | IC 4-20MA I-TRANSMITTER 14-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30_0611 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30_10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS12-STM4 OR STS3-STM1 SONET-SDH Transceiver |
| XRT91L306 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30ES | 功能描述:總線收發(fā)器 RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。