參數(shù)資料
型號: XRT86VX38IB329-F
廠商: Exar Corporation
文件頁數(shù): 20/61頁
文件大?。?/td> 0K
描述: IC TI/E1/J1 FRAMER/LIU 329FPBGA
標準包裝: 90
控制器類型: T1/E1/J1 調幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 329-FBGA
供應商設備封裝: 329-FPBGA(17x17)
包裝: 散裝
其它名稱: 1016-1439
XRT86VX38
24
REV. 1.0.3
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
RxTSEL
B5
A5
I
-
Receive Termination Control (RxTSEL):
Upon power up, the receivers are in "High" impedance.
Switching to internal termination can be selected through
the microprocessor interface by programming the appro-
priate channel register. However, to switch control to the
hardware pin, RxTCNTL must be programmed to "1" in the
appropriate global register (0x0FE2). Once control has
been granted to the hardware pin, it must be pulled "High"
to switch to internal termination.
NOTE: Internally pulled "Low" with a 50k
resistor.
TRANSMIT LINE INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
DESCRIPTION
TTIP0
TTIP1
TTIP2
TTIP3
TTIP4
TTIP5
TTIP6
TTIP7
D3
F3
H4
K4
L3
N3
R5
T3
C3
E3
G3
H3
J3
L3
M3
P3
O
Transmit Positive Analog Output (TTIPn):
TTIP is the positive differential output to the line interface. This out-
put pin, along with the corresponding TRING output pin, function as
the Transmit DS1/E1 output signal drivers for the XRT86VX38
device.
The user is expected to connect this signal and the corresponding
TRING output signal to a 1:2 step up transformer for proper opera-
tion.
This output pin will be tri-stated whenever the user sets the “TxON”
input pin or register bit (0xnF02, bit 3) to “0”.
NOTE: This pin should have a series line capacitor of 0.68
F for DC
blocking purposes.
TRING0
TRING1
TRING2
TRING3
TRING4
TRING5
TRING6
TRING7
E3
F4
H3
K3
L4
N4
R4
U3
D3
E4
G4
H4
J4
L4
M4
P4
O
Transmit Negative Analog Output (TRINGn):
TRING is the negative differential output to the line interface. This
output pin, along with the corresponding TTIP output pin, function as
the Transmit DS1/E1 output signal drivers for the XRT86VX38
device.
The user is expected to connect this signal and the corresponding
TRING output signal to a 1:2 step up transformer for proper opera-
tion.
NOTE: This output pin will be tri-stated whenever the user sets the
“TxON” input pin or register bit (0xnF02, bit 3) to “0”.
RECEIVE LINE INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE (MA)
DESCRIPTION
RxTSEL (pin)
Rx Termination
External
Internal
0
1
Note: RxTCNTL (bit) must be set to "1"
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