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參數(shù)資料
| 型號： | XRT86VX38IB329-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 22/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TI/E1/J1 FRAMER/LIU 329FPBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 控制器類型： | T1/E1/J1 調(diào)幀器，LIU |
| 電源電壓： | 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 329-FBGA |
| 供應(yīng)商設(shè)備封裝： | 329-FPBGA（17x17） |
| 包裝： | 散裝 |
| 其它名稱： | 1016-1439 |
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XRT86VX38
26
REV. 1.0.3
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
JTAG INTERFACE
The XRT86VX38 device’s JTAG features comply with the IEEE 1149.1 standard. Please refer to the industry
specification for additional information on boundary scan operations.
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE (MA)
DESCRIPTION
TCK
C10
D8
I
-
Test clock: Boundary Scan Test clock input:
The TCLK signal is the clock for the TAP controller, and it
generates the boundary scan data register clocking. The
data on TMS and TDI is loaded on the positive edge of
TCK. Data is observed at TDO on the falling edge of TCK.
TMS
B7
A6
I
-
Test Mode Select: Boundary Scan Test Mode Select
input.
The TMS signal controls the transitions of the TAP con-
troller in conjunction with the rising edge of the test clock
(TCK).
NOTE: This pin is internally pulled ’high’
TDI
A5
C8
I
-
Test Data In: Boundary Scan Test data input
The TDI signal is the serial test data input.
NOTE: This pin is internally pulled ’high’.
TDO
D7
B6
O
8
Test Data Out: Boundary Scan Test data output
The TDO signal is the serial test data output.
TRST
C9
D7
I
-
Test Reset Input:
The TRST signal (Active Low) asynchronously resets the
TAP controller to the Test-Logic-Reset state.
NOTE: This pin is internally pulled ’high’
aTEST
C7
I
-
Factory Test Mode Pin
NOTE: This pin is internally pulled ’low’, and should be
pulled ’low’ for normal operation.
MICROPROCESSOR INTERFACE
SIGNAL NAME
329 PKG
BALL#
256 PKG
BALL #
TYPE
OUTPUT
DRIVE (MA)
DESCRIPTION
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
N16
P19
K16
L18
J19
H18
H16
G15
M14
L12
K12
J12
H13
G14
G12
G13
I/O
8
Bidirectional Microprocessor Data Bus
These pins are used to drive and receive data over the bi-
directional data bus, whenever the Microprocessor per-
forms READ or WRITE operations with the Microprocessor
Interface of the XRT86VX38 device.
When DMA interface is enabled, these 8-bit bidirectional
data bus is also used by the T1/E1 Framer or the external
DMA Controller for storing and retrieving information.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30_0611 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30_10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS12-STM4 OR STS3-STM1 SONET-SDH Transceiver |
| XRT91L306 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30ES | 功能描述:總線收發(fā)器 RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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