
XRT84L38
198
OCTAL T1/E1/J1 FRAMER
Data input (TxSer_n)
Transmit Serial Clock Input signal (TxSerClk_n)
Transmit Single-frame Synchronization Input signal (TxSync_n)
Transmit Input Clock (TxInClk_n)
Transmit Time-slot Indication clock (TxTSClk_n)
Transmit Time Slot indicator bits (TxTSb[4:0]_n)
The Transmit Back-plane interface is still accepting data through TxSer_n at an E1 equivalent data rate of
2.048Mbit/s. However, the local Terminal Equipment supplies a free-running 8.192MHz clock to the Transmit
Input Clock pin of the framer. The local Terminal Equipment provides synchronized payload data at every other
four rising edge of the Transmit Input Clock. The Transmit High-speed Back-plane Interface of the framer then
latches incoming serial data at every other four falling edge of the clock. The local Terminal Equipment should
pump in data grouped in 256-bit frame 8000 times every second. Each frame consists of thirty-two octets as in
E1. The local Terminal Equipment maps a 193-bit T1 frame into this 256-bit format as described below:
REV. 1.0.1
1.
The Framing (F-bit) is mapped into MSB of the first E1 Time-slot. The local Terminal Equipment will stuff
the rest seven bits of the first octet with "don't care" bits that would be ignored by the framer.
2.
Payload data of T1 Time-slot 0, 1 and 2 are mapped into E1 Time-slot 1, 2 and 3.
3.
The local Terminal Equipment will stuff E1 Time-slot 4 with eight "don't care" bits that would be ignored by
the framer.
4.
Following the same rules of Step 2 and 3, the local Terminal Equipment maps every three time-slots of T1
payload data into four E1 time-slots.
The mapping of T1 frame into E1 framing format is shown in the table below.
The Transmit Single-frame Synchronization input signal (TxSync_n) should pulse HIGH at the beginning (F-bit
position) of the 256-bit frame indicating start of the frame. By sampling the HIGH pulse on the Transmit Single-
frame Synchronization signal, the framer can position the beginning of a DS1 frame. It is responsibility of the local
Terminal Equipment to align the Transmit Single-frame Synchronization signal with serial data stream going into
the framer.
Inside the framer, all the "don't care" bits will be stripped away. The framing bits, signaling and payload data are
then processed by the framer and send to LIU interface. The local Terminal Equipment provides a free-running
1.544MHz clock to the Transmit Serial Input clock. The framer will use this clock to carry the processed payload
and signaling data to the transmit section of the device.
T
ABLE
41: T
HE
MAPPING
OF
T1
FRAME
INTO
E1
FRAMING
FORMAT
T1
F-Bit
TS0
TS1
TS2
Don't Care Bits
TS3
TS4
TS5
E1
TS0
TS1
TS2
TS3
TS4
TS5
TS6
TS7
T1
Don't Care Bits
TS6
TS7
TS8
Don't Care Bits
TS9
TS10
TS11
E1
TS8
TS9
TS10
TS11
TS12
TS13
TS14
TS15
T1
Don't Care Bits
TS12
TS13
TS14
Don't Care Bits
TS15
TS16
TS17
E1
TS16
TS17
TS18
TS19
TS20
TS21
TS22
TS23
T1
Don't Care Bits
TS18
TS19
TS20
Don't Care Bits
TS21
TS22
TS23
E1
TS24
TS25
TS26
TS27
TS28
TS29
TS30
TS31