參數(shù)資料
型號(hào)： XE8000EV104
廠商： Semtech
文件頁數(shù)： 28/156頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XE8805AMI028LF
標(biāo)準(zhǔn)包裝： 1
類型： MCU
適用于相關(guān)產(chǎn)品： XE88LC05AMI028
所含物品： 完全組裝的評(píng)估板
Semtech 2006
www.semtech.com
18-2
XE8805/05A
18.1
Features
16-bits maximum input word width
Synchronization mechanism to guarantee data integrity when writing LSB and MSB 8-bits data
Programmable noise shaper order: second, first or order zero
Programmable PWM modulation between 4 and 11-bits
Programmable clock input frequency: fin or fin/2
Programmable output polarity: active high or low
On chip amplifier for analog filtering, voltage output or 4-20 mA loop
18.2
Overview of Signal DAC - The generic DAC
The generic DAC block consists of two major parts: the noise shaper (sigma-delta modulator) and the PWM
modulator as shown in Figure 18-1.
control
Sigma-delta
modulator
PWM
modulator
CPU
bus
16
4-11
m
DAS Out
amp
Figure 18-1. General block diagram
A D/A converter that is built with a digital PWM modulator needs a high clock frequency for a small signal
bandwidth. For a 10 bit digital PWM modulator for instance, a 10 bit counter is needed in order to create a pulse
with a resolution of 1024. This means that, in case an infinitely sharp analog output filter is used, the clock
frequency has to be at least 1024 times the output bandwidth. In practice however, in order to be able to build the
analog filter, the clock frequency needs to be much higher.
In order to reduce this frequency requirement, the input digital word is broken down into n words with a smaller
width m by a noise shaper so that the “average” (average for first order noise shaper, more complicated for higher
order noise shapers) value of the n m-bit words represents the full width input code. Instead of 1 pulse with the full
resolution, the PWM modulator now generates n pulses with a smaller resolution m. This increases the output
pulse repetition frequency with a factor n for identical clock frequency. Therefore, the analog output filtering is
easier to implement. Higher order noise shapers (order >1) allow to decrease the clock frequency for identical
signal bandwidth.
Another advantage is that the signal distortion is less dependent on the signal value. A disadvantage is however,
that the output signal after filtering is more dependent on the rise and fall times of the PWM output since there are
many more pulses.
The maximum word width at the input is 16-bit. If the word is narrower, 0’s have to be added after the LSB. In order
to maintain maximum flexibility, the order of the noise shaper and the resolution of the PWM modulation are
programmable by writing the codes CodeLmax and NsOrder to the configuration register. The possible noise
shaper order is 0 (which means no noise shaping), 1 or 2. The possible PWM modulation resolution m can be set
between 4 and 11.
Not
Recommended
for
New
Designs
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