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參數(shù)資料
型號(hào): XC3S1400AN-5FGG484C
廠商: Xilinx Inc
文件頁數(shù): 52/123頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-3AN 484FPGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-3AN
LAB/CLB數(shù): 2816
邏輯元件/單元數(shù): 25344
RAM 位總計(jì): 589824
輸入/輸出數(shù): 372
門數(shù): 1400000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
34
TIOPLID
The time it takes for data to travel
from the Input pin through the IFF
latch to the I output with the input
delay programmed
LVCMOS25(2)
1
XC3S1400AN
1.93
2.40
ns
2
2.69
3.15
ns
3
3.52
3.99
ns
4
3.89
4.55
ns
5
3.95
4.42
ns
6
4.53
5.32
ns
7
5.30
6.21
ns
8
5.83
6.80
ns
Notes:
1.
The numbers in this table are tested using the methodology presented in Table 30 and are based on the operating conditions set forth in
2.
This propagation time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. When this is
true, add the appropriate Input adjustment from Table 26.
Table 25: Propagation Times for the IOB Input Path (Cont’d)
Symbol
Description
Conditions
DELAY_VALUE
Device
Speed
Grade
Units
-5
-4
Max
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