參數(shù)資料
型號： XC3S1400AN-5FGG484C
廠商： Xilinx Inc
文件頁數(shù)： 27/123頁
文件大?。?/td> 0K
描述： IC FPGA SPARTAN-3AN 484FPGA
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-3AN
LAB/CLB數(shù)： 2816
邏輯元件/單元數(shù)： 25344
RAM 位總計： 589824
輸入/輸出數(shù)： 372
門數(shù)： 1400000
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 484-BBGA
供應(yīng)商設(shè)備封裝： 484-FBGA
Spartan-3AN FPGA Family: Pinout Descriptions
DS557 (v4.1) April 1, 2011
Product Specification
122
Revision History
The following table shows the revision history for this document.
Date
Version
Revision
02/26/07
1.0
Initial release.
08/16/07
2.0
Updated for Production release of initial device. Noted that family is available in Pb-free packages only.
09/12/07
2.0.1
Minor updates to text.
09/24/07
2.1
Update thermal characteristics in Table 67.
12/12/07
3.0
Updated to Production status with Production release of final family member, XC3S50AN. Noted that
non-Pb-free packages may be available for selected devices. Updated thermal characteristics in
Table 67. Updated links.
06/02/08
3.1
Add Package Overview section. Removed VREF and INPUT designations and diamond symbols on
unconnected N.C. pins for XC3S700AN FGG484 in Table 78 and Figure 22 and for XC3S1400AN
FGG676 in Table 82 and Figure 23.
11/19/09
3.2
Renamed package ‘Footprint Area’ to ‘Body Area’ throughout document. Noted in Introduction that
references to Pb-free package code also apply to the Pb package. Added Pb packages to Table 65 and
Table 66. Changed Body Area of TQ144/TQG144 packages in Table 65. Corrected bank designation
for SUSPEND to VCCAUX. Noted that non-Pb-free (Pb) packages are available for selected devices.
Updated Table 79 and Figure 22 for I/O vs. Input pin counts.
12/02/10
4.0
04/01/11
4.1
Updated the CLK description in Table 62. In Table 64, added device/package combinations for the
XC3S50AN and XC3S400AN in the FT(G)256 package and the XC3S1400AN in the FG(G)484
package. In Table 65, updated the maximum I/Os for the FG484/FGG484 packages, removed the
Mass column, and updated Note 1. In Table 65, changed the FTG256 link from PK115_FTG256,
FGG676 link from PK111_FGG676, and the TQG144 link from PK126_TQG144. Completely replaced
the section FTG256: 256-Ball Fine-Pitch, Thin Ball Grid Array with new information on the added
device/package combinations and new figures and tables. Revised U16, U7, and T8 in Table 78. Added
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參數(shù)描述
XC3S1400AN-5FGG676C 功能描述:IC FPGA SPARTAN -3N1400K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計:221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241
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