參數(shù)資料
型號(hào)： UPD78053GK-XXX-BE9
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, FINE PITCH, PLASTIC, TQFP-80
文件頁數(shù)： 78/78頁
文件大?。?/td> 610K
代理商： UPD78053GK-XXX-BE9
9
PD78052, 78053, 78054, 78055, 78056, 78058
Data Sheet U12327EJ5V0DS00
2. BLOCK DIAGRAM
Remark
The internal ROM and RAM capacity varies depending on the product.
TO0/P30
16-bit timer/
event counter
TI00/INTP0/P00
TI01/INTP1/P01
TO1/P31
8-bit timer/
event counter 1
TI1/P33
TO2/P32
8-bit timer/
event counter 2
TI2/P34
Watchdog timer
Watch timer
SI0/SB0/P25
Serial
interface 0
SO0/SB1/P26
SCK0/P27
SI2/RxD/P70
Serial
interface 2
SO2/TxD/P71
SCK2/ASCK/P72
AVDD
A/D converter
AVSS
AVREF0
ANI0/P10 to
ANI7/P17
Interrupt
control
INTP0/P00 to
INTP6/P06
Buzzer output
BUZ/P36
Clock output
control
PCL/P35
P00
Port 0
P01 to P06
P07
Port 1
P10 to P17
Port 2
P25 to P27
Port 3
P30 to P37
Port 7
P70 to P72
P120 to P127
P130, P131
Real-time
output port
RTP0/P120 to
RTP7/P127
External
access
AD0/P40 to
AD7/P47
ASTB/P67
RESET
X1
X2
XT1/P07
XT2
78K/0
CPU
core
ROM
RAM
System
control
VDD
VSS
IC
A8/P50 to
A15/P57
RD/P64
WR/P65
WAIT/P66
SI1/P20
Serial
interface 1
SO1/P21
SCK1/P22
STB/P23
BUSY/P24
AVSS
D/A converter
AVREF1
ANO0/P130,
ANO1/P131
Port 4
P40 to P47
Port 5
P50 to P57
Port 6
P60 to P67
Port 12
Port 13
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