參數(shù)資料
型號： UPD78053GK-XXX-BE9
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, FINE PITCH, PLASTIC, TQFP-80
文件頁數(shù)： 39/78頁
文件大?。?/td> 610K
代理商： UPD78053GK-XXX-BE9
44
PD78052, 78053, 78054, 78055, 78056, 78058
Data Sheet U12327EJ5V0DS00
AC Characteristics
(1) Basic operation (TA = –40 to +85
°C, VDD = 2.0 to 6.0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Cycle time
TCY
Operating with main system clock VDD = 2.7 to 6.0 V
0.8
64
s
(minimum
(fXX = 2.5 MHz)Note 1
2.2
64
s
instruction
Operating with main system clock 4.5 V
≤ VDD ≤ 6.0 V
0.4
32
s
execution time)
(fXX = 5.0 MHz)Note 2
2.7 V
≤ VDD < 4.5 V
0.8
32
s
Operating with subsystem clock
40Note 3
122
125
s
TI00, TI01, TI1, TI2
fTI
VDD = 4.5 to 6.0 V
0
4
MHz
input frequency
0
275
kHz
TI00 input high-/
tTIH,
3.5 V
≤ VDD ≤ 6.0 V
2/fsam + 0.1Note 4
s
low-level width
tTIL
2.7 V
≤ VDD < 3.5 V
2/fsam + 0.2Note 4
s
2/fsam + 0.5Note 4
s
TI01 input high-/
tTIH,VDD = 4.5 to 6.0 V
10
s
low-level width
tTIL
20
s
TI1, TI2 input high-/ tTIH,VDD = 4.5 to 6.0 V
100
ns
low-level width
tTIL
1.8
s
Interrupt request
tINTH,
INTP0
3.5 V
≤ VDD ≤ 6.0 V 2/fsam + 0.1Note 4
s
input high-/
tINTL
2.7 V
≤ VDD < 3.5 V 2/fsam + 0.2Note 4
s
low-level width
2/fsam + 0.5Note 4
s
INTP1 to INTP6, KR0 to KR7
VDD = 2.7 to 6.0 V
10
s
20
s
RESET
tRSL
VDD = 2.7 to 6.0 V
10
s
low-level width
20
s
Notes 1. Operation with main system clock fXX = fX/2 (when the oscillation mode selection register (OSMS) is set
to 00H)
2. Operation with main system clock fXX = fX (when OSMS is set to 01H)
3. Value when an external clock is used. When a crystal resonator is used, it is 114
s (MIN.).
4. Selection of fsam = fXX/2N, fXX/32, fXX/64, fXX/128 is possible with bits 0 and 1 (SCS0, SCS1) of the sampling
clock selection register (SCS) (when N= 0 to 4).
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