
CHAPTER 1 INTRODUCTION
User’s Manual U12768EJ4V1UD
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(6) Clock generator (CG)
The clock generator includes two types of oscillators: one each for the main clock (fXX) and subclock (fXT),
generates five types of clocks (fXX, fXX/2, fXX/4, fXX/8, and fXT), and supplies one of them as the operating clock for
the CPU (fCPU).
(7) Timer/counter
A two-channel 16-bit timer/event counter and a four-channel 8-bit timer/event counter are equipped, enabling
measurement of pulse intervals and frequency as well as programmable pulse output.
The two-channel 8-bit timer/event counter can be connected via a cascade connection to enable use as a 16-bit
timer.
(8) Watch timer
This timer generates an interrupt of the reference time period (0.5 seconds) for counting the clock (the 32.768 kHz
subclock or the 16.777 MHz main clock). At the same time, the watch timer can be used as an interval timer for
the main clock.
(9) Watchdog timer
A watchdog timer is equipped to detect program loops, system abnormalities, etc.
It can also be used as an interval timer.
When used as a watchdog timer, it generates a non-maskable interrupt request (INTWDT) after an overflow
occurs. When used as an interval timer, it generates a maskable interrupt request (INTWDTM) after an overflow
occurs.
(10) Serial interface (SIO)
The V850/SA1 includes four serial interface channels: for the asynchronous serial interface (UART0, UART1),
clocked serial interface (CSI0 to CSI2), and I
2C bus interface. One of these channels is switchable between the
UART and CSI and another is switchable between CSI and I
2C. Two channels are fixed to UART and CSI,
respectively.
For UART 0 and UART1, data is transferred via the TXD0, TXD1, RXD0, and RXD1 pins.
For CSI0 to CSI2, data is transferred via the SO0 to SO2, SI0 to SI2, and SCK0 to SCK2 pins.
For I
2C, data is transferred via the SDA and SCL pins. I2C is equipped only in the
PD703014AY, 703014BY,
703015AY, 703015BY, 703017AY, 70F3015BY, and 70F3017AY.
UART also has a two-channel dedicated baud rate generator.
(11) A/D converter
This high-speed, high-resolution 10-bit A/D converter includes 12 analog input pins.
Conversion uses the
successive approximation method.
(12) DMA controller
A three-channel DMA controller is equipped. This controller transfers data between the internal RAM and on-chip
peripheral I/O devices in response to interrupt requests sent by on-chip peripheral I/O.
(13) Real-time output port (RTP)
The RTP is a real-time output function that transfers previously set 8-bit data to an output latch when an external
trigger signal or timer compare register match signal occurs.
It can also be used in a 4-bit
× 2-channel
configuration.