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參數(shù)資料
| 型號： | TMX470R1A64PN |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16/32-Bit RISC Flash Microcontroller |
| 中文描述： | 16/32位RISC閃存微控制器 |
| 文件頁數(shù)： | 40/46頁 |
| 文件大?。?/td> | 381K |
| 代理商： | TMX470R1A64PN |
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A
MULTI-BUFFERED A-TO-D CONVERTER (MibADC)
The multi-buffered A-to-D converter (MibADC) has a separate power bus for its analog circuitry. This power bus
enhances the A-to-D performance by preventing digital switching noise on the logic circuitry that could be present
on V
SS
and V
CC
from coupling into the A-to-D analog stage. All A-to-D specifications are given with respect to
AD
REFLO
unless otherwise noted.
TMS470R1A64
16/32-Bit RISC Flash Microcontroller
SPNS099–NOVEMBER 2004
Resolution
Monotonic
Output conversion code
10 bits (1024 values)
Assured
00h to 3FFh [00 for V
AI
≤
AD
REFLO
; 3FF for V
AI
≥
AD
REFHI
]
MibADC recommended operating conditions
(1)
MIN
V
SSAD
V
SSAD
V
SSAD
- 0.3
MAX
V
CCAD
V
CCAD
V
CCAD
+ 0.3
UNIT
V
V
V
AD
REFHI
AD
REFLO
V
AI
A-to-D high-voltage reference source
A-to-D low-voltage reference source
Analog input voltage
Analog input clamp current
(2)
(V
AI
< V
SSAD
- 0.3 or V
AI
> V
CCAD
+ 0.3)
I
AIC
-2
2
mA
(1)
(2)
For V
and V
recommended operating conditions, see the "device recommended operating conditions" table.
Input currents into any ADC input channel outside the specified limits could affect conversion results of other channels.
operating characteristics over full ranges of recommended operating conditions
(1)(2)
PARAMETER
Analog input resistance
DESCRIPTION/CONDITIONS
See Figure 18.
MIN
TYP
250
MAX UNIT
500
10
30
1
5
R
i
pF
pF
μA
mA
Conversion
Sampling
C
i
Analog input capacitance
See Figure 18.
I
AIL
I
ADREFHI
Analog input leakage current
AD
REFHI
input current
Conversion range over which specified
accuracy is maintained
See Figure 18.
AD
REFHI
= 3.6 V, AD
REFLO
= V
SSAD
-1
CR
AD
REFHI
- AD
REFLO
3
3.6
V
Difference between the actual step width and the ideal
value after offset correction. See Figure 19.
Maximum deviation from the best straight line through
the MibADC. MibADC transfer characteristics, exclud-
ing the quantization error after offset correction. See
Figure 20.
Maximum value of the difference between an analog
value and the ideal midstep value. See Figure 21.
E
DNL
Differential nonlinearity error
±
2
LSB
E
INL
Integral nonlinearity error
±
2
LSB
E
TOT
Total error/Absolute accuracy
±
2
LSB
(1)
(2)
V
= AD
REFHI
1 LSB = (AD
REFHI
- AD
REFLO
)/ 2
10
for the MibADC
40
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