參數(shù)資料
型號: TMS320C241FNS
元件分類: 數(shù)字信號處理
英文描述: 16-Bit Digital Signal Processor
中文描述: 16位數(shù)字信號處理器
文件頁數(shù): 84/116頁
文件大?。?/td> 1485K
代理商: TMS320C241FNS
TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999
84
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
interrupt timings
INT refers to NMI, XINT1, and XINT2/IO. PDP refers to PDPINT.
switching characteristics over recommended operating conditions (see Figure 31)
PARAMETER
MIN
MAX
UNIT
thz(PWM)PDP
Delay time, PDPINT low to PWM to high-impedance state
12
ns
td(INT)
Delay time, INT low/high to interrupt-vector fetch
10tc(CO)
ns
timing requirements [H = 0.5t
c(CO)
] (see Figure 31)
MIN
MAX
UNIT
tw(INT)
tw(PDP)
Pulse duration, INT input low/high
2H+15
ns
Pulse duration, PDPINT input low
4H+5
ns
PWM
PDPINT
CLKOUT
tw(PDP)
thz(PWM)PDP
XINT1/XINT2/NMI
tw(INT)
ADDRESS
Interrupt Vector
td(INT)
Figure 31. Power Drive Protection Interrupt Timing
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