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參數(shù)資料
| 型號： | TMS320C241FNS |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-Bit Digital Signal Processor |
| 中文描述： | 16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 62/116頁 |
| 文件大?。?/td> | 1485K |
| 代理商： | TMS320C241FNS |
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TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999
62
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
watchdog (WD) timer module (continued)
Table 19. WD Overflow (Timeout) Selections
WD PRESCALE SELECT BITS
39.0625-kHz WDCLK
WDPS2
WDPS1
WDPS0
WDCLK DIVIDER
FREQUENCY (Hz)
MINIMUM
OVERFLOW (ms)
0
0
X
1
152.59
6.55
0
1
0
2
76.29
13.11
0
1
1
4
38.15
26.21
1
0
0
8
19.07
52.43
1
0
1
16
9.54
104.86
1
1
0
32
4.77
209.72
1
1
1
64
2.38
419.43
Generated by 5-MHz clock
X = Don’t care
scan-based emulation
TMS320x2xx
hardware-development support. Scan-based emulation allows the emulator to control the processor in the
system without the use of intrusive cables to the full pinout of the device. The scan-based emulator
communicates with the ’x2xx by way of the IEEE 1149.1-compatible (JTAG) interface. The ’F243 and ’F241
DSPs, like the TMS320F206, TMS320C203, and TMS320LC203, do not include boundary scan. The scan
chain of these devices is useful for emulation function only.
devices
incorporate
scan-based
emulation
logic
for
code-development
and
TMS320x24x instruction set
The ’x24x microprocessor implements a comprehensive instruction set that supports both numeric-intensive
signal-processing operations and general-purpose applications, such as multiprocessing and high-speed
control. Source code for the ’C1x and ’C2x DSPs is upwardly compatible with the ’x243/’x241 devices.
For maximum throughput, the next instruction is prefetched while the current one is being executed. Because
the same data lines are used to communicate to external data, program, or I/O space, the number of cycles an
instruction requires to execute varies, depending upon whether the next data operand fetch is from internal or
external memory. Highest throughput is achieved by maintaining data memory on chip and using either internal
or fast external program memory.
addressing modes
The TMS320x24x instruction set provides four basic memory-addressing modes: direct, indirect, immediate,
and register.
In direct addressing, the instruction word contains the lower seven bits of the data memory address. This field
is concatenated with the nine bits of the data memory page pointer (DP) to form the 16-bit data memory address.
Therefore, in the direct-addressing mode, data memory is paged effectively with a total of 512 pages, each page
containing 128 words.
Indirect addressing accesses data memory through the auxiliary registers. In this addressing mode, the address
of the instruction operand is contained in the currently selected auxiliary register. Eight auxiliary registers
(AR0–AR7) provide flexible and powerful indirect addressing. To select a specific auxiliary register, the auxiliary
register pointer (ARP) is loaded with a value from 0 to 7 for AR0 through AR7, respectively.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS320C241PGS | 16-Bit Digital Signal Processor |
| TMS320F241FNQ | 16-Bit Digital Signal Processor |
| TMS320F241PGQ | 16-Bit Digital Signal Processor |
| TMS320F243PGEQ | 16-Bit Digital Signal Processor |
| TMS320F243PGES | 16-Bit Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C241PGS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| TMS320C242 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DSP CONTROLLER |
| TMS320C242FN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DSP CONTROLLER |
| TMS320C242FNA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| TMS320C242FNS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
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