
STDM110
4-98
Samsung ASIC
POT1/2/4/8_ABB
Analog Tri-state Output Buffers with Enable Port and Separate Bulk-Bias
Switching Characteristics
(Typical process, 25
°
C, 1.8V, 2.5V, t
R
/t
F
= 0.19ns, CL: Capacitive Load)
POT2_ABB
POT4_ABB
Path
Parameter
Delay [ns]
CL = 50.0pF
16.047
18.535
9.104
10.982
16.047
18.535
9.388
11.386
1.690
1.690
16.047
18.535
9.569
11.566
1.772
1.773
<
Delay Equations [ns]
Group1*
0.897 + 0.303*CL
1.010 + 0.350*CL
1.850 + 0.145*CL
1.862 + 0.182*CL
0.897 + 0.303*CL
1.010 + 0.350*CL
2.132 + 0.145*CL
2.265 + 0.182*CL
1.690 + 0.000*CL
1.690 + 0.000*CL
0.897 + 0.303*CL
1.010 + 0.350*CL
2.315 + 0.145*CL
2.448 + 0.182*CL
1.772 + 0.000*CL
1.773 + 0.000*CL
Group2*
0.899 + 0.303*CL
1.011 + 0.350*CL
1.851 + 0.145*CL
1.864 + 0.182*CL
0.899 + 0.303*CL
1.011 + 0.350*CL
2.135 + 0.145*CL
2.266 + 0.182*CL
1.690 + 0.000*CL
1.690 + 0.000*CL
0.899 + 0.303*CL
1.011 + 0.350*CL
2.316 + 0.145*CL
2.446 + 0.182*CL
1.772 + 0.000*CL
1.773 + 0.000*CL
Group3*
0.899 + 0.303*CL
1.011 + 0.350*CL
1.849 + 0.145*CL
1.864 + 0.182*CL
0.899 + 0.303*CL
1.011 + 0.350*CL
2.131 + 0.145*CL
2.266 + 0.182*CL
1.690 + 0.000*CL
1.690 + 0.000*CL
0.899 + 0.303*CL
1.011 + 0.350*CL
2.314 + 0.145*CL
2.449 + 0.182*CL
1.772 + 0.000*CL
1.773 + 0.000*CL
A to PAD
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
tPLZ
tPHZ
tR
tF
tPLH
tPHL
tPLZ
tPHZ
TN to PAD
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =
Path
Parameter
Delay [ns]
CL = 50.0pF
8.054
9.284
5.467
6.235
8.054
9.284
5.752
6.638
1.822
1.901
8.054
9.284
5.932
6.819
1.905
1.983
<
Delay Equations [ns]
Group1*
0.484 + 0.151*CL
0.522 + 0.175*CL
1.840 + 0.073*CL
1.676 + 0.091*CL
0.484 + 0.151*CL
0.522 + 0.175*CL
2.122 + 0.073*CL
2.076 + 0.091*CL
1.822 + 0.000*CL
1.901 + 0.000*CL
0.484 + 0.151*CL
0.522 + 0.175*CL
2.305 + 0.073*CL
2.258 + 0.091*CL
1.905 + 0.000*CL
1.983 + 0.000*CL
Group2*
0.480 + 0.151*CL
0.521 + 0.175*CL
1.840 + 0.073*CL
1.676 + 0.091*CL
0.480 + 0.151*CL
0.521 + 0.175*CL
2.124 + 0.073*CL
2.078 + 0.091*CL
1.822 + 0.000*CL
1.901 + 0.000*CL
0.480 + 0.151*CL
0.521 + 0.175*CL
2.305 + 0.073*CL
2.259 + 0.091*CL
1.905 + 0.000*CL
1.983 + 0.000*CL
Group3*
0.480 + 0.151*CL
0.522 + 0.175*CL
1.840 + 0.073*CL
1.677 + 0.091*CL
0.480 + 0.151*CL
0.522 + 0.175*CL
2.124 + 0.073*CL
2.078 + 0.091*CL
1.822 + 0.000*CL
1.901 + 0.000*CL
0.480 + 0.151*CL
0.522 + 0.175*CL
2.305 + 0.073*CL
2.260 + 0.091*CL
1.905 + 0.000*CL
1.983 + 0.000*CL
A to PAD
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
tPLZ
tPHZ
tR
tF
tPLH
tPHL
tPLZ
tPHZ
TN to PAD
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =