參數(shù)資料
型號： ST7DALI
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI
中文描述： 8位單電壓閃存存儲器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，定時器，SPI和大理微控制器
文件頁數(shù)： 53/141頁
文件大?。?/td> 2175K
代理商： ST7DALI
ST7DALI
53/141
WATCHDOG TIMER
(Cont’d)
11.1.5 Interrupts
None.
11.1.6 Register Description
CONTROL REGISTER (CR)
Read/Write
Reset Value: 0111 1111 (7Fh)
Bit 7 =
WDGA
Activation bit
.
This bit is set by software and only cleared by
hardware after a reset. When WDGA = 1, the
watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
Note:
This bit is not used if the hardware watch-
dog option is enabled by option byte.
Bit 6:0 =
T[6:0]
7-bit timer (MSB to LSB).
These bits contain the decremented value. A reset
is produced when it rolls over from 40h to 3Fh (T6
becomes cleared).
7
0
WDGA
T6
T5
T4
T3
T2
T1
T0
1
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