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參數(shù)資料
| 型號(hào)： | ST7DALI |
| 廠(chǎng)商： | 意法半導(dǎo)體 |
| 元件分類(lèi)： | ADC |
| 英文描述： | 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI |
| 中文描述： | 8位單電壓閃存存儲(chǔ)器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，定時(shí)器，SPI和大理微控制器 |
| 文件頁(yè)數(shù)： | 42/141頁(yè) |
| 文件大小： | 2175K |
| 代理商： | ST7DALI |
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ST7DALI
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1
POWER SAVING MODES
(Cont’d)
Figure 25. ACTIVE-HALT Timing Overview
Figure 26. ACTIVE-HALT Mode Flow-chart
Notes:
1.
This delay occurs only if the MCU exits ACTIVE-
HALT mode by means of a RESET.
2.
Peripherals clocked with an external clock
source can still be active.
3.
Only the RTC1 interrupt and some specific inter-
rupts can exit the MCU from ACTIVE-HALT mode.
Refer to Table 5, “Interrupt Mapping,” on page 35
for more details.
4.
Before servicing an interrupt, the CC register is
pushed on the stack. The I bit of the CC register is
set during the interrupt routine and cleared when
the CC register is popped.
9.6 AUTO WAKE UP FROM HALT MODE
Auto Wake Up From Halt (AWUFH) mode is simi-
lar to Halt mode with the addition of a specific in-
ternal RC oscillator for wake-up (Auto Wake Up
from Halt Oscillator). Compared to ACTIVE-HALT
mode, AWUFH has lower power consumption (the
main clock is not kept running, but there is no ac-
curate realtime clock available.
It is entered by executing the HALT instruction
when the AWUEN bit in the AWUCSR register has
been set.
Figure 27. AWUFH Mode Block Diagram
As soon as HALT mode is entered, and if the
AWUEN bit has been set in the AWUCSR register,
the AWU RC oscillator provides a clock signal
(f
AWU_RC
). Its frequency is divided by a fixed divid-
er and a programmable prescaler controlled by the
AWUPR register. The output of this prescaler pro-
vides the delay time. When the delay has elapsed
the AWUF flag is set by hardware and an interrupt
wakes-up the MCU from Halt mode. At the same
time the main oscillator is immediately turned on
and a 256 or 4096 cycle delay is used to stabilize
it. After this start-up delay, the CPU resumes oper-
ation by servicing the AWUFH interrupt. The AWU
flag and its associated interrupt are cleared by
software reading the AWUCSR register.
To compensate for any frequency dispersion of
the AWU RC oscillator, it can be calibrated by
measuring the clock frequency f
AWU_RC
and then
calculating the right prescaler value. Measurement
mode is enabled by setting the AWUM bit in the
AWUCSR register in Run mode. This connects
f
AWU_RC
to the input capture of the 12-bit Auto-Re-
load timer, allowing the f
AWU_RC
to be measured
using the main oscillator clock as a reference time-
base.
HALT
RUN
RUN
256 OR 4096 CPU
CYCLE DELAY
1)
RESET
OR
INTERRUPT
HALT
INSTRUCTION
[Active Halt Enabled]
FETCH
VECTOR
ACTIVE
HALT
INSTRUCTION
(Active Halt enabled)
(AWUCSR.AWUEN=0)
RESET
INTERRUPT
3)
Y
N
N
Y
CPU
I BIT
OSCILLATOR
PERIPHERALS
2)
ON
OFF
OFF
0
FETCH RESET VECTOR
OR SERVICE INTERRUPT
CPU
I BIT
OSCILLATOR
PERIPHERALS
2)
ON
OFF
ON
X
4)
CPU
I BIT
OSCILLATOR
PERIPHERALS
ON
ON
ON
X
4)
256 OR 4096 CPU CLOCK
CYCLE
DELAY
AWU RC
oscillator
AWUFH
f
AWU_RC
AWUFH
interrupt
(ei0 source)
prescaler/1 .. 255
/64
divider
to Timer input capture
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