參數(shù)資料
型號： ST72C171K2
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU WITH 8K FLASH. ADC. WDG. SPI. SCI. TIMERS SPGAS (SOFTWARE PROGRAMMABLE GAIN AMPLIFIERS). OP-AMP
中文描述： 8位8K閃存微控制器。 ADC的。水分散粒劑。的SPI。脊髓損傷。定時(shí)器SPGAS（軟件可編程增益放大器）。運(yùn)放
文件頁數(shù)： 6/152頁
文件大小： 1384K
代理商： ST72C171K2
ST72C171
6/152
PIN DESCRIPTION
(Cont’d)
Legend / Abbreviations:
Type:
In/Output level: C = CMOS 0.3V
DD
/0.7V
DD
,
C
R
= CMOS Levels with resistive output (1K)
A = Analog levels
Output level:
HS = high sink (on N-buffer only),
Port configuration capabilities:
– Input:float = floating, wpu = weak pull-up, int = interrupt, ana = analog
– Output: OD = open drain, T = true open drain, PP = push-pull
Note:
the Reset configuration of each pin is shown in bold.
I = input, O = output, S = supply
Table 1. Device Pin Description
Pin
n°
Pin Name
T
Level
Port
Main
function
(after
reset)
Alternate function
S
1
S
1
I
O
Input
Output
f
w
i
a
O
P
OA2OUT
PC1/OA2PIN/
PWM1R
PC0/OA2NIN
OA3PIN
PB7/TDO
PB6/RDI
O
A
OA2 output
2
2
I/O
C
C/C
R
X
X
X
X
X
Port C1
OA2 noninverting input and/or
ART PWM1 resistive output
OA2 inverting input
OA3 noninverting input
SCI transmit
SCI receive
SPI data master in/slave out or
In Situ Programming Data In-
put
SPI data master out/slave in
SPI Clock or In Situ Program-
ming Clock Output
SPI Slave Select (active low)
ART External Clock
Timer16 External Clock
Digital Main Supply Voltage
Digital ground voltage
Resonator oscillator inverter output or capaci-
tor input for RC oscillator
External clock input or Resonator oscillator in-
verter input or resistor input for RC oscillator
In Situ Programming Mode Select
Must be tied to V
SS
in user mode
External Reset
Port A0
ADC input 0
ADC input 1 orTimer16 input
capture 2
3
-
4
5
3
4
5
6
I/O C/A
I
I/O
I/O
C
X
X
X
X
X
Port C0
A
C
C
X
X
ei1
ei1
X
X
X
X
Port B7
Port B6
6
7
PB5/MISO/ISPDATA I/O
C
X
ei1
X
X
Port B5
7
8
PB4/MOSI
I/O
C
HS
X
ei1
X
X
Port B4
8
9
PB3/SCK/ISPCLK
I/O
C
HS
X
ei1
X
X
Port B3
9 10 PB2/SS
10 11 PB1/ARTCLK
11 12 PB0/EXTCLK
12 13 V
DD
13 14 V
SS
I/O
I/O
I/O
S
S
C
C
C
HS
HS
HS
X
X
X
ei1
ei1
ei1
X
X
X
X
X
X
Port B2
Port B1
Port B0
14 15 OSC2
15 16 OSC1
16 17 ISPSEL
I
C
17 18 RESET
18 19 PA0/AIN0
I/O
I/O
C
C
X
X
X
X
ei0
X
X
19 20 PA1/AIN1/ICAP2
I/O
C
X
ei0
X
X
X
Port A1
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