參數(shù)資料
型號： ST72C171K2
廠商： 意法半導體
英文描述： 8-BIT MCU WITH 8K FLASH. ADC. WDG. SPI. SCI. TIMERS SPGAS (SOFTWARE PROGRAMMABLE GAIN AMPLIFIERS). OP-AMP
中文描述： 8位8K閃存微控制器。 ADC的。水分散粒劑。的SPI。脊髓損傷。定時器SPGAS（軟件可編程增益放大器）。運放
文件頁數(shù)： 129/152頁
文件大小： 1384K
代理商： ST72C171K2
ST72C171
129/152
9.8 I/O PORT PIN CHARACTERISTICS
9.8.1 General Characteristics
Subject to general operating conditions for V
DD
, f
OSC
, and T
A
unless otherwise specified.
Figure 81. Two typical Applications with unused I/O Pin
Figure 82. Typical I
PU
vs. V
DD
with V
IN
=V
SS
Notes:
1.
Unless otherwise specified, typical data are based on T
A
=25°C and V
DD
=5V.
2. Data based on characterization results, not tested in production.
3.
Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4.
Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
Figure 81
). Data based on design simulation and/or technology
characteristics, not tested in production.
5. The R
PU
pull-up equivalent resistor is based on a resistive transistor (corresponding I
current characteristics de-
scribed in
Figure 82
). This data is based on characterization results, tested in production at V
DD
max.
6. Data based on characterization results, not tested in production.
7. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Symbol
V
IL
V
IH
V
hys
I
L
I
S
Parameter
Conditions
Min
Typ
1)
Max
0.3xV
DD
Unit
Input low level voltage
2)
Input high level voltage
2)
Schmitt trigger voltage hysteresis
3)
Input leakage current
Static current consumption
4)
V
0.7xV
DD
400
mV
V
SS
≤
V
IN
≤
V
DD
Floating input mode
±1
200
250
230
μ
A
R
PU
Weak pull-up equivalent resistor
5)
V
IN
=
V
SS
V
DD
=5V
V
DD
=3.3V
70
170
120
200
5
25
25
k
C
IO
t
f(IO)out
t
r(IO)out
t
w(IT)in
I/O pin capacitance
Output high to low level fall time
6)
Output low to high level rise time
6)
External interrupt pulse time
7)
pF
C
L
=50pF
Between 10% and 90%
ns
1
t
CPU
10k
UNUSED I/O PORT
ST72XXX
10k
UNUSED I/O PORT
ST72XXX
V
DD
3.2
3.5
4
4.5
5
5.5
Vdd [V]
0
10
20
30
40
50
60
70
Ipu [μA]
Ta=-40°C
Ta=25°C
Ta=85°C
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