參數(shù)資料
型號： ST72C171K2
廠商： 意法半導體
英文描述： 8-BIT MCU WITH 8K FLASH. ADC. WDG. SPI. SCI. TIMERS SPGAS (SOFTWARE PROGRAMMABLE GAIN AMPLIFIERS). OP-AMP
中文描述： 8位8K閃存微控制器。 ADC的。水分散粒劑。的SPI。脊髓損傷。定時器SPGAS（軟件可編程增益放大器）。運放
文件頁數(shù)： 37/152頁
文件大?。?/td> 1384K
代理商： ST72C171K2
ST72C171
37/152
7.2.2 Miscellaneous Register 2 (MISCR2)
Miscellaneous register 2 is used to configure of
SPI and the output selection of the PWMs.
Register Address: 0040h
Reset Value: 0000 0000 (00h)
—
Read/Write
Bit 7:5 =
not used
Bit 4 =
SPIOD
SPI output disable
This bit is used to disable the SPI output on the I/O
port (in both master or slave mode).
0: SPI output enabled
1: SPI output disabled
(I/O pin free for general-purpose I/O)
Bit 3 =
P1OS
PWM1 output select
This bit is used to select the output for the PWM1
channel of the ART/PWM Timer.
0: PWM1 output on PWM1 pin
1: PWM1 output on PWM1R pin and connected to
the OA2PIN pin
Note:
In order to use the PC1 port pin as a PWM
output pin, bit 1 of port C must be programmed as
floating input. This should be done prior to setting
the P1OS bit.
Bit 2 =
P0OS
PWM0 output select
This bit is used to select the output for the PWM0
channel of ART/PWM Timer.
0: PWM0 output on PWM0 pin
1: PWM0 output on PWM0R pin and connected to
the OA1PIN pin
Note:
In order to use the PC2 port pin as a PWM
output pin, bit 2 of port C must be programmed as
floating input. This should be done prior to setting
the P0OS bit.
Bit 1 =
SSM
SS mode selection
It is set and cleared by software.
0: Normal mode - SS uses information coming
from the SS pin of the SPI.
1: I/O mode, the SPI uses the information stored
into bit SSI.
Bit 0 =
SSI
SS internal mode
This bit replaces pin SS of the SPI when bit SSM is
set to 1. (see SPI description). It is set and cleared
by software.
7
0
-
-
-
SPIOD P1OS P0OS SSM
SSI
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