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參數(shù)資料
| 型號： | ST52X420 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | ADC |
| 英文描述： | 8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Three Timer/PWMs, ADC, WDG |
| 中文描述： | 8位智能控制器病房（ICU）3個(gè)定時(shí)器/的PWM，ADC的，水分散粒劑 |
| 文件頁數(shù)： | 73/84頁 |
| 文件大小： | 1274K |
| 代理商： | ST52X420 |
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ST52T410/ST52T420/E420
73/84
11.7 ESD Pin Protection Strategy
In order to protect an integrated circuit against
Electro-Static Discharge the stress must be
controlled to prevent degradation or destruction of
the circuit elements. Stress generally affects the
circuit elements, which are connected to the pads
but can also affect the internal devices when the
supply pads receive the stress. The elements that
are to be protected must not receive excessive
current, voltage, or heating within their structure.
An ESD network combines the different input and
output protections. This network works by allowing
safe discharge paths for the pins subject to ESD
stress. Two critical ESD stress cases are
presented in Figure 11.8 and Figure 11.9 for
standard pins.
11.7.1 Standard Pin Protection
In order to protect the output structure the following
elements are added:
- A diode to V
DD
(3a) and a diode from V
SS
(3b)
- A protection device between V
DD
and V
SS
(4)
In order protect the input structure the following
elements are added:
- A resistor in series with pad (1)
- A diode to V
DD
(2a) and a diode from V
SS
(2b)
- A protection device between V
DD
and V
SS
(4)
Figure 11.8 Safe discharge path subjected to ESD stress
Figure 11.9 Negative Stress on a Standard Pad vs. VDD
OUT
(4)
IN
VDD
VSS
VDD
VSS
(2a)
(2b)
(3a)
(3b)
(1)
Main path
Path to avoid
Main path
VSS
VDD
OUT
(3b)
(4)
IN
(3a)
(2b)
(1)
VSS
(2a)
VDD
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|---|---|
| ST52X430 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, SCI |
| ST52X430KIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, SCI |
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