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參數(shù)資料
| 型號(hào)： | ST52X420 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | ADC |
| 英文描述： | 8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Three Timer/PWMs, ADC, WDG |
| 中文描述： | 8位智能控制器病房（ICU）3個(gè)定時(shí)器/的PWM，ADC的，水分散粒劑 |
| 文件頁數(shù)： | 17/84頁 |
| 文件大小： | 1274K |
| 代理商： | ST52X420 |
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ST52T410/ST52T420/E420
17/84
The ST52T410/ST52x420 core uses flags that
correspond to the actual mode. As soon as an
interrupt is generated the ST52T410/ST52x420
core uses the interrupt flags instead of the normal
flags.
Each interrupt level has its own set of flags, which
is saved in the STACK together with the Program
Counter. These flags are restored from the STACK
automatically when a RETI instruction is executed.
If the MCU was in normal mode before an interrupt,
the normal flags are restored when the RETI
instruction is executed.
Note:
A CALL subroutine is a normal mode
execution. For this reason, a RET instruction,
consequent to a CALL instruction does not affect
the normal mode set of flags.
Flags are not cleared during context switching and
remain in the state they were at the end of the last
interrupt routine switching.
The Carry flag is set when an overflow occurs
during arithmetic operations, otherwise it is
cleared.
The Sign flag is set when an underflow occurs
during arithmetic operations, otherwise it is
cleared.
2.3 Address Spaces
ST52T410/ST52x420 has four separate address
spaces:
Figure 2.3 Address Spaces Description
I
RAM: 128 Bytes
I
Input Registers: 18 8-bit registers
I
Output Registers 9 8-bit registers
I
Configuration Registers: 17 8-bit registers
I
Program memory up to 4K Bytes
Program memory will be described in further
details in the MEMORY section
2.3.1 RAM and STACK.
RAM memory consists of 128 general purpose 8-
bit RAM registers.
All the registers in RAM can be specified by using
a decimal address. For example, 0 identifies the
first register of RAM.
To read or write RAM registers LOAD instructions
must be used. See Table 2.5
Each interrupt level has its own set of flags, which
is saved in the STACK together with the Program
Counter. These flags are restored from the STACK
automatically when a RETI instruction is executed.
When the instructions like Interrupt request or
CALL are executed, a STACK level is used to push
the PC.
The STACK is located in RAM. For each level of
stack, 2 bytes of RAM are used. The values of this
stack are stored from the last RAM register
(address 127).
The maximum level of stack
must be less than 128
.
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