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參數(shù)資料
| 型號： | ST52X420 |
| 廠商： | 意法半導體 |
| 元件分類： | ADC |
| 英文描述： | 8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Three Timer/PWMs, ADC, WDG |
| 中文描述： | 8位智能控制器病房（ICU）3個定時器/的PWM，ADC的，水分散粒劑 |
| 文件頁數(shù)： | 53/84頁 |
| 文件大小： | 1274K |
| 代理商： | ST52X420 |
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ST52T410/ST52T420/E420
53/84
Figure 10.2 Timer 0 External START/STOP Mode
NOTE: The external clock signal applied on the
T0CLK pin must have a frequency at least two
times smaller than the internal master clock.
The prescaler output can be selected by setting the
PRESCx bit of REG_CONF6, REG_CONF9 and
REG_CONF11 registers (see Table 10.2, Table
10.5 and Table 10.7).
REMARK: The first period of the TxOUT signal
is one clock cycle shorter.
TxRES resets the content of the 8-bit counter x to
zero. It is generated by the TIRSTx and TxMSK
bits of REG_CONF5, REG_CONF7, REG_CONF8
and REG_CONF10 registers (see Table 10.1,
Table 10.3, Table 10.4 and Table 10.6).
TxSTRT signal starts/stops Timer x counting only
if the peripherals are configured in Timer mode.
This signal is forced by setting the correspondent
TISTRx bit of REG_CONF5, REG_CONF8 and
REG_CONF10 registers (see Table 10.1, Table
10.4 and Table 10.6).
TxMSK bits mask the reset of each timer and can
be utilized to synchronize a simultaneous start of
the timers by means (for example), of the following
procedure, which starts three timers:
1) TIRST0 = TIRST1 = TIRST2 = 0,
2) TISTR0 = TISTR1 = TISTR2 = 0,
3) T0MSK = T1MSK = T2MSK = 1,
4) TIRST0 = TIRST1 = TIRST2 = 1,
5) TISTR0 = TISTR1 = TISTR2 = 1,
6) T0MSK = T1MSK = T2MSK = 0,
When TxMSK is 1 the TIMER x is reset.
REMARK: to use the simultaneus start, the
prescalers of the Timers must have the same
value. Simultaneus start cannot be used in
Timer mode
Figure 10.3 TIMEROUT Signal Type
TIMER 0 START/STOP can be provided externally
on the T0STRT pin. In this case, the T0STRT
signal allows the user to work in two different
modes by setting the TESTR configuration bit of
REG_CONF5 register (see Figure 10.2) (Input
capture):
Level
Edge
start
stop
start
start
stop
start
0
1
1
0
4
4
3
2
Reset
Clock
Counted
Value
Timer Output
Type 1
Type 2
Prescout*Counter
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