參數(shù)資料
型號(hào)： ST52X420
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Three Timer/PWMs, ADC, WDG
中文描述： 8位智能控制器病房（ICU）3個(gè)定時(shí)器/的PWM，ADC的，水分散粒劑
文件頁(yè)數(shù)： 41/84頁(yè)
文件大?。?/td> 1274K
代理商： ST52X420
ST52T410/ST52T420/E420
41/84
7 I/O PORTS
7.1 Introduction
ST52T410/ST52x420 devices feature flexible
individually programmable multi-functional input/
output lines. Refer to the following figure for
specific pin allocations.
19 I/O lines, grouped in 3 different ports are
available on the ST52T410/ST52x420:
PORT A =
7 or 8-bit ports (PA0 - PA7 pins)
PORT B
= 7 or 8-bit ports (PB0 - PB7 pins)
PORT C
= 4-bit port (PC0 - PC3 pins)
PIN 18 can be configured to belong to port A or to
port B.
These I/O lines can be programmed to provide
digital input/output and analog input, or to connect
input/output signals to the on-chip peripherals as
alternate pin functions.
Input buffers are TTL compatible with Schmitt
trigger in port A and C while port B is CMOS
compatible without Schmitt trigger.
The output buffer can supply up to 8 mA.
The port cannot be configured to be used
contemporaneously as input and output.
Figure 7.1 Ports A & C Functional Blocks
Each port is configured by using two configuration
registers. The first is used to determine if a pin is
an input or output, while the second defines the
Alternate functions.
7.2 Input Mode
The input configuration is selected by setting the
corresponding configuration register bit to
“
1
”
(REG_CONF 4, 13 and 15) (see paragraph I/O
Port Configuration Registers). The ports are
configured by using the configuration registers
illustrated in the following table.
.
Table 7.1 I/O Port Configuration Registers.
Digital input data is automatically stored in the
Input Registers, but it cannot be read directly. In
order to read a single bit of the IR its value must be
copied in a RAM location. Digital data is stored in a
RAM location by using the assembler instruction:
LDRI RAM_Reg Input_i
PORT A
PORT B
PORT C
Reg_Conf 4
Reg_Conf 13
Reg_Conf 15
TTL
PORT A PIN
or PORT C PIN
TO INPUT REGISTER
and PERIPHERALS
FROM PERIPHERAL
FROM OUTPUT REGISTER
FROM CONFIGURATION REGISTER
FROM CONFIGURATION REGISTER
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