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參數(shù)資料
| 型號： | ST52X420 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | ADC |
| 英文描述： | 8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Three Timer/PWMs, ADC, WDG |
| 中文描述： | 8位智能控制器病房（ICU）3個定時器/的PWM，ADC的，水分散粒劑 |
| 文件頁數(shù)： | 25/84頁 |
| 文件大?。?/td> | 1274K |
| 代理商： | ST52X420 |
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ST52T410/ST52T420/E430
25/84
Figure 3.2 Eprom Programming Timing
The operations above are managed by using the
internal 4-bit EPROM Control Register. The
reading phase is executed with V
PP
=
5V
±
5%, while
the verify/Margin Mode phase needs V
PP
=
12V
±
5%. The Blank Check must be a reading
operation with V
PP
=
5V
±
5%.
Table 3.1 illustrates EPROM Control Register
codes used to identify the operation running.
3.1 EPROM Programming Phase Procedure
The Programming mode is selected by applying
12V
±
5% voltage or 5V
±
5% voltage to the V
PP
pin
and setting the control signal as following:
RESET =Vss
TEST =Vss
If the V
PP
voltage is 5V
±
5% only reading may be
performed.
RST_ADD, INC_ADD, RST_CONF, INC_CONF
and PHASE are the control signals used during the
Programming Mode.
PHASE, RST_CONF and RST_ADD signals are
active on level, the others are active on rising
edge.
Table 3.1 EPROM Control Register
OPERATION
REGISTER VALUE
Stand By
0
Memory Reading/Verify
1
Memory Unlock and
Lock Status Reading
2
Memory Writing
3
Memory Lock
4
ID CODE Writing
5
Memory Lock Status
Reading/Verify
9
ID CODE Reading/
Verify
10
MEMORY UNLOCK
MEMORY WRITING
LOCATION ADDRESS =1
DATA
IN
MEMORY VERIFY
MARGIN MODE
DATA
OUT
VALID
DATA
VALID
DATA
VALID
DATA
DATA
OUT
DATA
OUT
100nS
10
μ
S
PA(0:7)
RST_ADD
ST_CONF
INC_ADD
INC_CONF
PHASE
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| ST52X430 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, SCI |
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