參數(shù)資料
型號(hào): SPAK56F826BU80
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-BIT, 80 MHz, OTHER DSP, PQFP100
封裝: LQFP-100
文件頁數(shù): 3/53頁
文件大?。?/td> 829K
代理商: SPAK56F826BU80
Signals and Package Information
MOTOROLA
DSP56F826 Preliminary Technical Data
11
TA0-0
(GPIOF0)
91
Input/Output
TA0–3—Timer F Channels 0, 1, 2, and 3
Port F GPIO—These four General Purpose I/O (GPIO) pins can be
individually programmed as input or output.
After reset, the default state is Quad Timer.
TA0-1
(GPIOF1)
90
TA0-2
(GPIOF2)
89
TA0-3
(GPIOF3)
88
TCK
100
Input
Test Clock Input—This input pin provides a gated clock to
synchronize the test logic and shift serial data to the JTAG/OnCE
port. The pin is connected internally to a pull-down resistor.
TMS
1
Input
Test Mode Select Input—This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising edge
of TCK and has an on-chip pull-up resistor.
TDI
2
Input
Test Data Input—This input pin provides a serial input data stream to
the JTAG/OnCE port. It is sampled on the rising edge of TCK and has
an on-chip pull-up resistor.
TDO
3
Output
Test Data Output—This tri-statable output pin provides a serial
output data stream from the JTAG/OnCE port. It is driven in the Shift-
IR and Shift-DR controller states, and changes on the falling edge of
TCK.
TRST
4
Input
Test Reset—As an input, a low signal on this pin provides a reset
signal to the JTAG TAP controller. To ensure complete hardware
reset, TRST should be asserted whenever RESET is asserted. The
only exception occurs in a debugging environment when a hardware
DSP reset is required and it is necessary not to reset the JTAG/OnCE
module. In this case, assert RESET, but do not assert TRST.
DE
98
Output
Debug Event—DE provides a low pulse on recognized debug events.
TCS
99
Input/Output
TCS—This pin is reserved for factory use. It must be tied to VSS for
normal use. In block diagrams, this pin is considered an additional
VSS.
Table 3. DSP56F826 Signal and Package Information for the 100 Pin LQFP
Signal
Name
Pin No.
Type
Description
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