參數(shù)資料
型號(hào): SDED5-008G-NCY
廠商: SANDISK CORP
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封裝: 12 X 18 MM, 1.40 MM HEIGHT, FBGA-115
文件頁數(shù): 21/87頁
文件大?。?/td> 1675K
代理商: SDED5-008G-NCY
Rev. 1.2
Theory of Operation
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
28
92-DS-1205-10
code. During the time between BUSY# signal de-assertion and completing the download of
Embedded TrueFFS, mDOC H3 will respond only to accesses to the XIP Boot Block (including
Paged RAM accesses) in order to facilitate completion of the IPL execution.
Once Embedded TrueFFS is loaded, executed and has completed its media mount process,
mDOC H3 is ready to be used as a fully functional storage device.
3.5
Error Detection Code/Error Correction Code (EDC/ECC)
Since NAND-based flash is prone to errors, it requires unique error-handling capabilities to
ensure required reliability. SanDisk’s TrueFFS technology, embedded within mDOC H3,
includes a powerful Error Detection Code / Error Correction Code (EDC/ECC), based on the
Bose, Chaudhuri and Hocquenghem (BCH) algorithm. Both EDC and ECC are implemented in
hardware to optimize performance.
Each time a 512-byte sector is written, additional parity bits are calculated and written to the
flash. Each time data is read from the flash, the parity bits are read and used for calculating error
locations.
It ensures that the minimal amount of code is used for detection and correction to deliver the
required reliability without degrading performance.
3.6
Block Device Management
Block device management is performed by an embedded SW module, responsible for execution
of all Block Device operations, such as address calculation, erase, read and writes operations etc.
This module translates these operations from virtual media terms (i.e. sector addresses) to flash
media terms (i.e. flash planes, blocks and pages).
These Block Device operations are typically initiated by the host File System, translated by the
DOC Driver and sent to the device over the host interface. The Host Agent (above) is responsible
for capture and transfer to the Block Device management.
相關(guān)PDF資料
PDF描述
MD80C154-12/883 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40
MD80C154-16P883D 8-BIT, 16 MHz, MICROCONTROLLER, CDIP40
MR83C154CXXX-20/883D 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
MQ83C154CXXX-L16/883 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MD83C154CXXX-25P883D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
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