參數(shù)資料
型號(hào)： SDED5-008G-NCY
廠商： SANDISK CORP
元件分類(lèi)： 存儲(chǔ)控制器/管理單元
英文描述： FLASH MEMORY DRIVE CONTROLLER, PBGA115
封裝： 12 X 18 MM, 1.40 MM HEIGHT, FBGA-115
文件頁(yè)數(shù)： 20/87頁(yè)
文件大小： 1675K
代理商： SDED5-008G-NCY
Rev. 1.2
Theory of Operation
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
27
92-DS-1205-10
3.2.3
Serial Interface
The Serial interface (SPI) provides mDOC H3 a secondary interface with debug and
programming capabilities. mDOC H3 SPI Interface is configured as Slave. All four combinations
of clock phase (CPHA) and clock polarity (CPOL) which are defined by the SPI specification are
supported.
The Serial interface supports two usage scenarios:
1. Debug port: Allowing the host with an SPI interface to read debug messages.
2. Format and Program port: Allowing a programmer to use this port in order to format and
program the device.
The serial protocol debug port provides a means for the serial interface (SPI Slave) to queue and
transmit debug messages to a host equipped with an SPI interface.
All transfers are performed in multiples of 8 bits, with the MSB of each byte transmitted first.
3.3
Host Agent
3.3.1
Host Protocol
Block of registers and logic required for implementing block device operations over the host
interface. This block implements a set of complex transactions required for operating the mDOC
H3 device. These transactions include data storage operations as well as device configuration and
management.
3.3.2
Boot Block (XIP)
The Programmable Boot Block with XIP functionality enables mDOC H3 to act as a boot device
(in addition to performing flash disk data storage functions). This eliminates the need for
expensive, legacy NOR flash or any other boot device on the motherboard.
The Programmable Boot Block is 32KB in size. The Boot Agent, described in the next section, is
responsible for copying the boot code/data from the flash into the boot block.
3.4
Boot Agent
Upon power-up or when the RSTIN# signal is de-asserted, the Boot Agent automatically
downloads the Initial Program Loader (IPL) to the Programmable Boot Block. The IPL contains
the code for starting the Host boot process. The download process is quick, and is designed so
that when the CPU accesses mDOC H3 for code execution, the IPL code is already located in the
Programmable Boot Block. During the download process, mDOC H3 does not respond to read or
write accesses. Host systems must therefore observe the requirements described in Section
During the download process, mDOC H3 asserts the BUSY# signal to indicate to the system that
it is not yet ready to be accessed. Once BUSY# is de-asserted, the system can access mDOC H3.
Note that after IPL is loaded and BUSY# is de-asserted, the Boot Agent continues to download
the embedded TrueFFS from Flash to the mDOC H3 internal RAM, and then executes it.
Downloading the embedded TrueFFS is done in parallel to the host system accessing the IPL
相關(guān)PDF資料
PDF描述
MD80C154-12/883 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40
MD80C154-16P883D 8-BIT, 16 MHz, MICROCONTROLLER, CDIP40
MR83C154CXXX-20/883D 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
MQ83C154CXXX-L16/883 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MD83C154CXXX-25P883D 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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SDED7-256M-N9T 功能描述:IC MDOC H3 2GB 115-FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類(lèi)型:EEPROM 存儲(chǔ)容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁(yè)面:1445 (CN2011-ZH PDF)
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