參數(shù)資料
型號: S71PL191HB0BFI100
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 9 X 13 MM, LEAD FREE, FBGA-73
文件頁數(shù): 90/172頁
文件大?。?/td> 4662K
代理商: S71PL191HB0BFI100
8
S29PL127H/S29PL129H
S29PL127H_129H_00A1 May 7, 2004
Pr el i m i n ary
PIN DESCRIPTION
Amax–A0
=
23 or 22-bit address bus for 128 Mb device
DQ15–DQ0
=
16-bit data inputs/outputs/float
CE#
=
Chip Enable Input (S29PL127H)
CE1#, CE2#
=
Chip Enable Inputs (S29PL129H)
OE#
=
Output Enable Input
WE#
=
Write Enable
VSS
=
Device Ground
NC
=
Pin Not Connected Internally
RY/BY#
=
Ready/Busy output and open drain. When RY/BY#=
VIH, the device is ready to accept read operations
and commands. When RY/BY#= VOL, the device is
either executing an embedded algorithm or the
device is executing a hardware reset operation.
WP#/ACC
=
Write Protect/Acceleration Input. When WP/ACC#=
VIL, the highest and lowest two 4K-word sectors are
write protected regardless of other sector protection
configurations. When WP/ACC#= VIH, these sector
are unprotected unless the DYB or PPB is
programmed. When WP/ACC#= 12V, program and
erase operations are accelerated.
VCC
=
Chip Power Supply (2.7 V to 3.6 V)
RESET#
=
Hardware Reset Pin
Logic Symbol
23 or 22
16
DQ15–DQ0
Amax–A0
CE#(S29PL127H)
OE#
WE#
RESET#
RY/BY#
WP#/ACC
CE1#(S29PL129H)
CE2#(S29PL129H)
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