參數(shù)資料
型號(hào): S71PL191HB0BFI100
廠商: SPANSION LLC
元件分類(lèi): 存儲(chǔ)器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 9 X 13 MM, LEAD FREE, FBGA-73
文件頁(yè)數(shù): 117/172頁(yè)
文件大?。?/td> 4662K
代理商: S71PL191HB0BFI100
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)當(dāng)前第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)
May 7, 2004 S29PL127H_129H_00A1
S29PL127H/S29PL129H
33
Pre l i m i n a r y
All 4 Kword boot-block sectors have individual sector Persistent Protection Bits
(PPBs) for greater flexibility. Each PPB is individually modifiable through the PPB
Write Command.
The device erases all PPBs in parallel. If any PPB requires erasure, the device
must be instructed to preprogram all of the sector PPBs prior to PPB erasure. Oth-
erwise, a previously erased sector PPBs can potentially be over-erased. The
flash device does not have a built-in means of preventing sector PPBs
over-erasure.
Persistent Protection Bit Lock (PPB Lock)
The Persistent Protection Bit Lock (PPB Lock) is a global volatile bit. When set to
“1”, the PPBs cannot be changed. When cleared (“0”), the PPBs are changeable.
There is only one PPB Lock bit per device. The PPB Lock is cleared after power-
up or hardware reset. There is no command sequence to unlock the PPB Lock.
Dynamic Protection Bit (DYB)
A volatile protection bit is assigned for each sector. After power-up or hardware
reset, the contents of all DYBs is “0”. Each DYB is individually modifiable through
the DYB Write Command.
When the parts are first shipped, the PPBs are cleared, the DYBs are cleared, and
PPB Lock is defaulted to power up in the cleared state – meaning the PPBs are
changeable.
When the device is first powered on the DYBs power up cleared (sectors not pro-
tected). The Protection State for each sector is determined by the logical OR of
the PPB and the DYB related to that sector. For the sectors that have the PPBs
cleared, the DYBs control whether or not the sector is protected or unprotected.
By issuing the DYB Write command sequences, the DYBs will be set or cleared,
thus placing each sector in the protected or unprotected state. These are the so-
called Dynamic Locked or Unlocked states. They are called dynamic states be-
cause it is very easy to switch back and forth between the protected and
unprotected conditions. This allows software to easily protect sectors against in-
advertent changes yet does not prevent the easy removal of protection when
changes are needed. The DYBs maybe set or cleared as often as needed.
The PPBs allow for a more static, and difficult to change, level of protection. The
PPBs retain their state across power cycles because they are non-volatile. Indi-
vidual PPBs are set with a command but must all be cleared as a group through
a complex sequence of program and erasing commands. The PPBs are also lim-
ited to 100 erase cycles.
The PPB Lock bit adds an additional level of protection. Once all PPBs are pro-
grammed to the desired settings, the PPB Lock may be set to “1”. Setting the PPB
Lock disables all program and erase commands to the non-volatile PPBs. In ef-
fect, the PPB Lock Bit locks the PPBs into their current state. The only way to clear
the PPB Lock is to go through a power cycle. System boot code can determine if
any changes to the PPB are needed; for example, to allow new system code to
be downloaded. If no changes are needed then the boot code can set the PPB
Lock to disable any further changes to the PPBs during system operation.
The WP#/ACC write protect pin adds a final level of hardware protection to sec-
tors 0, 1, 268, and 269 (S29PL127H); SA1-133, SA1-134, SA2-0, and SA2-1
(S29PL129H). When this pin is low it is not possible to change the contents of
these sectors. These sectors generally hold system boot code. The WP#/ACC pin
can prevent any changes to the boot code that could override the choices made
while setting up sector protection during system initialization.
It is possible to have sectors that have been persistently locked, and sectors that
are left in the dynamic state. The sectors in the dynamic state are all unprotected.
相關(guān)PDF資料
PDF描述
S71VS128RC0ZHK203 SPECIALTY MEMORY CIRCUIT, PBGA56
S71VS128RC0ZHK2L2 SPECIALTY MEMORY CIRCUIT, PBGA56
S71WS512ND0BAWEH SPECIALTY MEMORY CIRCUIT, PBGA84
S72NS512PE0AHGL02 SPECIALTY MEMORY CIRCUIT, PBGA133
S7911 PIN PHOTO DIODE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S71PL254 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL254J 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL254J04BAW0Z0 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Based MCPs
S71PL254J04BAW0Z2 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Based MCPs
S71PL254J04BAW0Z3 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Based MCPs