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參數(shù)資料
| 型號： | S3P1860-DK |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDIP20 |
| 封裝： | 0.300 INCH, DIP-20 |
| 文件頁數(shù)： | 39/95頁 |
| 文件大?。?/td> | 339K |
| 代理商： | S3P1860-DK |
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INSTRUCTION SET
S3C1840/C1850/C1860/P1860
5-16
ADDS
A,#n
Binary Code:
0 1 1 1
d d d d
Description:
The specified 4-bit data n is added to the accumulator and the sum is stored in the
accumulator.
Operation:
(A)
← (A) + #n
Flags:
SF : Set if a carry occurred, cleared otherwise
SL : Unaffected
Example:
CLR
A
; Clear A to zero
ADDS
A,#4H
; Add 4H to A, it leaves 4H in A
SUBS
A,@HL
Binary Code:
0 0 1 1
1 1 0 0
Description:
SUBS subtracts the contents of accumulator from the contents of indirect data memory,
leaving the result in the accumulator.
The contents of source operand are unaffected.
Operation:
(A)
← M [(H,L)] - (A)
Flags:
SF : Set if no borrow occurred, cleared otherwise
SL : Unaffected
Example:
Assume RAM address holds 0CH
MOV
L,#8H
MOV
A,L
SUBS
A,@HL
; Subtract A from 0CH; it will leave 4H in A
INCS
A,@HL
Binary Code:
0 0 1 1
1 1 1 0
Description:
The contents of indirect data memory are incremented by one and the result is loaded into
the accumulator.
The contents of indirect data memory are unaffected.
Operation:
(A)
← M [(H,L)] + 1
Flags:
SF : Set if a carry occurred, cleared otherwise
SL : Unaffected
Example:
Assume RAM address holds 6H
CLR
A
; Clear A to zero
INCS
A,@HL
; Increment 6H by one and leave 7H in A
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| S3C1860XX-SK | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO20 |
| S3C1860XX-DK | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP20 |
| S3P7048-QZ | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP42 |
| S3P72B9-QA | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP128 |
| S3C72B5XX-QA | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP128 |
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