參數(shù)資料
型號: S3P1860-DK
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDIP20
封裝: 0.300 INCH, DIP-20
文件頁數(shù): 38/95頁
文件大小: 339K
代理商: S3P1860-DK
S3C1840/C1850/C1860/P1860
INSTRUCTION SET
5-15
NOT
H
Binary Code:
0 0 0 0
1 0 0 1
Description:
The MSB of register H is complemented,
Operation:
(H)
← (H)
Flags:
SF : Set to one
SL : Unaffected
Example:
MOV
H,#4H
NOT
H
; Complement 4H (100B), then it leaves 00H (000B) in REG H
CLR
A
Binary Code:
0 1 1 1
1 1 1 1
Description:
The contents of the accumulator are cleared to zero (all bits set on zero).
Operation:
(A)
← 0
Flags:
SF : Set to one
SL : Unaffected
Example:
CLR
A
; A value are cleared to zero
ADDS
A,@HL
Binary Code:
0 0 0 0
0 1 1 0
Description:
ADDS adds the contents of indirect data memory to accumulator, leaving the result in the
accumulator.
The contents of the source operand are unaffected.
Operation:
(A)
← M [(H,L)] + (A)
Flags:
SF : Set if a carry occurred, cleared otherwise
SL : Unaffected
Example:
Assume RAM address holds 5H
CLR
A
; Clear A to zero
ADDS
A,@HL
; This instruction will leaves 5H in A
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