
I-104
EPSON
S1C62N33 TECHNICAL HARDWARE
CHAPTER 5: SUMMARY OF NOTES
(2) When the I/O port is set to the output mode and the data
register has been read, the terminal data instead of the
register data can be read out. Because of this, if a low-
impedance load is connected and read-out performed, the
value of the register and the read-out result may differ.
(1) When 40H–6FH is selected for the segment data memory,
the memory data and the display will not match until the
area is initialized (through, for instance, memory clear
processing by the CPU). Initialize the segment data mem-
ory by executing initial processing.
(2) When C0H–EFH is selected for the segment data memory,
that area becomes write-only. Consequently, data cannot
be rewritten by arithmetic operations (such as AND, OR,
ADD, SUB).
(1) When the clock timer has been reset, the interrupt factor
flag (TI) may sometimes be set to "1". Consequently,
perform flag read-out (reset the flag) as necessary at
reset.
(2) The input clock of the watchdog timer is the 2 Hz signal
of the clock timer, so that the watchdog timer may be
counted up at timer reset.
(3) Read-out the interrupt factor flag (TI) only during the DI
status (interrupt flag = "0"). Read-out during EI status
will cause malfunction.
(4) Writing to the interrupt mask registers (ETI) can be done
only in the DI status (interrupt flag = "0"). Writing during
EI status will cause malfunction.
(1) If counter data is read out in the RUN status, the counter
must be made into the STOP status, and after data is
read out the RUN status can be restored. If data is read
out when a carry occurs, the data cannot be read cor-
rectly.
Also, the processing above must be performed within the
STOP interval of 976 s (256 Hz 1/4 cycle).
(2) Read-out of the interrupt factor flag (SWIT) must be done
only in the DI status (interrupt flag = "0"). Read-out
during EI status will cause malfunction.
LCD driver
Clock timer
Stopwatch counter