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| 型號： | QUADS68040UM_D |
| 英文描述： | M68360QUADS-040 User＇s Manual |
| 中文描述： | M68360QUADS - 040使用手冊 |
| 文件頁數(shù)： | 56/86頁 |
| 文件大?。?/td> | 1351K |
| 代理商： | QUADS68040UM_D |
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Freescale Semiconductor, Inc.
SUPPORT INFORMATION
56
FIGURE B-1 Host Computer (ADI) to M68360QUADS-040 Connection
B.3.1
Write Cycle from Host to M68360QUADS-040
The application software in the Host uses the handshake signals to coordinate data transfer across the
parallel link. The QUICC040bug software in the M68360QUADS-040 is responsible for accepting the data
and responding to the handshake signals. The signals are shown in FIGURE B-2.
The sequence of events during a byte write to the M68360QUADS-040 is as follows:
1.
The Host selects the M68360QUADS-040 board by putting the board’s address on the
ADS_SEL(0:2) signals.
2.
The Host places a data byte in the data bus latch (buffer is in high-impedance state).
3.
The Host asserts the HOST_REQ signal (the data buffer is enabled, data appears on the
bus).
4.
The M68360QUADS-040 detects the HOST_REQ signal and reads the data byte.
5.
The M68360QUADS-040 asserts the ADS_ACK signal.
HOST_REQ
ADS_ACK
ADS_REQ
HST_ACK
ADS_BRK
HOST_BRK~
ADS_INT
INT_ACK
ADS_RESET
ADS_ALL
ADS_SEL(0:2)
PD(0:7)
HOST_ENABLE~
HOST_VCC
M68360QUADS-040
A
HOST
COMPUTER
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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