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| 型號： | QUADS68040UM_D |
| 英文描述： | M68360QUADS-040 User＇s Manual |
| 中文描述： | M68360QUADS - 040使用手冊 |
| 文件頁數(shù)： | 33/86頁 |
| 文件大?。?/td> | 1351K |
| 代理商： | QUADS68040UM_D |
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Freescale Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
33
The ADI port connector is a 37 pin, male, D type connector. The connection between the M68360QUADS-
040 and the host computer is by a 37 line flat cable, supplied with the ADI board. FIGURE 4-2 below shows
the pin configuration of the connector.
FIGURE 4-2 ADI Port Connector
NOTE: Pin 26 on the ADI is connected to +12 v power supply, but it is not used in the M68360QUADS-040.
4.11.3.1
ADI Port Signal Description
The ADI port on the QUADS-040 was slightly modified to generate either hard reset or soft reset. This
feature was added to comply with the QUICC’s reset mechanism. The host software written for the
QUADS-040 should be able to work properly with existing ADS boards, such as the M68302ADS.
In the list below, the directions ’I’, ’O’, and ’I/O’ are relative to the M68360QUADS-040 board. (I.E. ’I’ means
input to the M68360QUADS-040)
NOTE:
Since the ADI was originated for the DSP56001ADS, some of
its signals throughout the boards it was used with, were
designated with the prefix “ADS”. This convention is kept with
this design also.
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
INT_ACK
N.C.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
(+ 12 v) N.C.
HOST_VCC
HOST_VCC
HOST_VCC
HOST_ENABLE~
HST_ACK
ADS_ALL
ADS_RESET
ADS_SEL2
ADS_SEL1
ADS_SEL0
HOST_REQ
ADS_REQ
ADS_ACK
ADS_INT
HOST_BRK~
ADS_BRK
N.C.
PD1
PD3
PD5
PD7
Gnd
Gnd
Gnd
PD0
PD2
PD4
PD6
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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