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| 型號： | QUADS68040UM_D |
| 英文描述： | M68360QUADS-040 User＇s Manual |
| 中文描述： | M68360QUADS - 040使用手冊 |
| 文件頁數(shù)： | 40/86頁 |
| 文件大小： | 1351K |
| 代理商： | QUADS68040UM_D |
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Freescale Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
40
Port C is 12 pins port. TABLE 4-2 describes the configuration of port C.
4.11.8.4
Slave QUICC Port E
Port E pins can be configured to operate in one of two dedicated peripheral functions. The PEPAR register
configures the operation mode, as described in section 3.4.5 on page 21.
TABLE 4-4 Port C Pins Description
Pin
Pin Name
Description
0
EEST TENA
This pin is connected to the TENA input of the EEST. It is configured as the RTS
signal of SCC1 in the slave QUICC.
1
SIA TENA
This pin is connected to the TENA input of the SIA. It is configured as the RTS signal
of SCC2 in the slave QUICC.
2 - 3
PC2 - PC3
These pins are connected to the expansion connector P11 and may be used by
user’s applications.
4
EEST CLSN
This pin is connected to the CLSN output of the EEST. It is configured as the CTS
signal of SCC1 in the slave QUICC.
5
EEST RENA
This pin is connected to the RENA output of the EEST. It is configured as the CD
signal of SCC1 in the slave QUICC.
6
SIA CLSN
This pin is connected to the CLSN output of the EEST. It is configured as the CTS
signal of SCC2 in the slave QUICC.
7
SIA RENA
This pin is connected to the RENA output of the EEST. It is configured as the CD
signal of SCC2 in the slave QUICC.
8 - 11
PC8 - PC11
These pins are connected to the expansion connector P11 and may be used by
user’s applications.
F
For More Information On This Product,
Go to: www.freescale.com
n
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