參數(shù)資料
型號： QL8325
廠商： Electronic Theatre Controls, Inc.
英文描述： LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM
中文描述： 低功耗FPGA配合力性能密度和嵌入式內(nèi)存
文件頁數(shù)： 4/49頁
文件大?。?/td> 739K
代理商： QL8325
Preliminary
;
The Eclipse-II Product Family includes up to 24 dual-port 2,304-bit RAM modules for
implementing RAM, ROM, and FIFO functions. Each module is user-configurable into four
different block organizations and can be cascaded horizontally to increase their effective width, or
vertically to increase their effective depth as shown in
;
.
!""#
The number of RAM modules varies from 4 to 24 blocks for a total of 9.2 K to 55.3 K bits of
RAM. Using two "mode" pins, designers can configure each module into 128 x 18 (Mode 0), 256
x 9 (Mode 1), 512 x 4 (Mode 2), or 1024 x 2 blocks (Mode 3). The blocks are also easily
cascadable to increase their effective width and/or depth (see
;
).
QS
A1
A2
A3
A4
A5
A6
OS
OP
B1
B2
C1
C2
MP
MS
D1
D2
E1
E2
NP
NS
F1
F2
F3
F4
F5
F6
PS
PP
QR
AZ
OZ
QZ
NZ
FZ
Q2Z
MODE[1:0]
WA[9:0]
WD[17:0]
WE
WCLK
2,304-bit RAM Module
ASYNCRD
RA[9:0]
RD[17:0]
RE
RCLK
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