參數(shù)資料
型號： PSD413A2V-A-20JI
廠商： 意法半導(dǎo)體
英文描述： Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁數(shù)： 2/120頁
文件大?。?/td> 563K
代理商： PSD413A2V-A-20JI
i
Revision A Flash PSD
PSD813F1-A
Flash In-System-Programmable Microcontroller Peripherals
Table of Contents
1.0
2.0
Introduction...........................................................................................................................................................1
Key Features ........................................................................................................................................................2
PSD813F1 Block Diagram .............................................................................................................................4
General Information..............................................................................................................................................5
PSD813F1 Family.................................................................................................................................................5
PSD813F1 Architectural Overview .......................................................................................................................6
5.1 Memory...................................................................................................................................................6
5.2 Page Register.........................................................................................................................................6
5.3 PLDs.......................................................................................................................................................6
5.4 I/O Ports..................................................................................................................................................7
5.5 Microcontroller Bus Interface..................................................................................................................7
5.6 JTAG Port...............................................................................................................................................7
5.7 In-System Programming.........................................................................................................................8
5.8 Power Management................................................................................................................................8
Development System............................................................................................................................................9
PSD813F1 Pin Descriptions ...............................................................................................................................10
PSD813F1 Register Description and Address Offset.........................................................................................14
PSD813F1 Functional Blocks.............................................................................................................................15
9.1 Memory Blocks .....................................................................................................................................15
9.1.1 Main Flash and Secondary EEPROM........................................................................................15
9.1.2 SRAM.........................................................................................................................................29
9.1.3 Memory Select Signals...............................................................................................................29
9.1.4 Page Register.............................................................................................................................32
9.2 PLDs.....................................................................................................................................................33
9.2.1 Decode PLD (DPLD)..................................................................................................................35
9.2.2 Complex PLD (CPLD)................................................................................................................35
9.3 Microcontroller Bus Interface................................................................................................................44
9.3.1 PSD813F Interface to a Multiplexed 8-bit Bus ...........................................................................44
9.3.2 PSD813F Interface to a Non-Multiplexed 8-bit Bus....................................................................44
9.3.3 Data Byte Enable Reference......................................................................................................47
9.3.4 Microcontroller Interface Examples............................................................................................47
9.4 I/O Ports................................................................................................................................................52
9.4.1 General Port Architecture...........................................................................................................52
9.4.2 Port Operating Modes................................................................................................................54
9.4.3 Port Configuration Registers (PCRs) .........................................................................................57
9.4.4 Port Data Registers....................................................................................................................60
9.4.5 Ports A and B – Functionality and Structure ............................................................................61
9.4.6 Port C – Functionality and Structure ........................................................................................63
9.4.7 Port D – Functionality and Structure ........................................................................................63
9.5 Power Management..............................................................................................................................67
9.5.1 Automatic Power Down (APD) Unit and Power Down Mode .....................................................67
9.5.2 Other Power Saving Options......................................................................................................71
9.5.3 Reset and Power On Requirement ............................................................................................72
3.0
4.0
5.0
6.0
7.0
8.0
9.0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4-16 制造商:Tamura Corporation of America 功能描述:
PSD4-20 制造商:MICROTRAN 功能描述:POWER TRANSFORMER, 6 VA
PSD4235G2-70U 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2-90UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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