參數(shù)資料
型號: PSD413A2V-A-20JI
廠商: 意法半導體
英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述: Flash在系統(tǒng)可編程ISP的外設的8位微控制器
文件頁數(shù): 17/120頁
文件大小: 563K
代理商: PSD413A2V-A-20JI
Preliminary
PSD813F1-A
13
Table 5.
PSD813F1
Pin
Descriptions
(cont.)
Pin Name
Pin*
Type
Description
PC7
11
I/O
PC7 pin of Port C. This port pin can be configured to have
the following functions:
1. MCU I/O
write to or read from a standard output or
input port.
2. CPLD Micro
Cell (McellBC7) output.
3. Input to the PLDs.
4. DBE
active-low Data Byte Enable input from 68HC912
type MCUs.
This pin can be configured as a CMOS or Open Drain output.
PD0 pin of Port D. This port pin can be configured to have
the following functions:
1. ALE/AS input latches address output from the MCU.
2. MCU I/O
write or read from a standard output or input
port.
3. Input to the PLDs.
4. CPLD output (external chip select).
PD1 pin of Port D. This port pin can be configured to have
the following functions:
1. MCU I/O
write to or read from a standard output or
input port.
2. Input to the PLDs.
3. CPLD output (external chip select).
4. CLKIN
clock input to the CPLD Micro
Cells, the
automatic power-down unit
s power-down counter, and
the CPLD AND array.
PD2 pin of Port D. This port pin can be configured to have
the following functions:
1. MCU I/O
write to or read from a standard output or
input port.
2. Input to the PLDs.
3. CPLD output (external chip select).
4. CSI
chip select input. When low, the MCU can access
the PSD memory and I/O. When high, the PSD memory
blocks are disabled to conserve power.
Power pins
Ground pins
PD0
10
I/O
PD1
9
I/O
PD2
8
I/O
V
CC
GND
15, 38
1,16,26
Port A
Port B
Microcontroller
8051XA (8-bit)
80C251 (page mode)
All other 8-bit
multiplexed
8-bit non-multiplexed
bus
Port A (3:0)
N/A
N/A
Port A (7:4)
Address [7:4]
N/A
Port B (3:0)
Address [11:8]
Address [11:8]
Port B (7:4)
N/A
Address [15:12]
Address [3:0]
Address [7:4]
Address [3:0]
Address [7:4]
N/A
N/A
Address [3:0]
Address [7:4]
Table 6. I/OPort Latched Address Output Assignments*
N/A = Not Applicable
*
*
Refer to the I/O Port Section on how to enable the Latched Address Output function.
*
*
The pin numbers in this table are for the PLCC package only. See the package information section for pin
numbers on other package types.
**
These functions can be multiplexed with other functions.
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