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參數(shù)資料
| 型號： | PDI1394P25BY |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 1-port 400 Mbps physical layer interface |
| 中文描述： | DATACOM, INTERFACE CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 214K |
| 代理商： | PDI1394P25BY |
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Philips Semiconductors
Product data
PDI1394P25BY
1-port 400 Mbps physical layer interface
2002 Oct 11
9
9.0
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
V
DD
Supply voltage
Source power node
3.0
2.7
1
3.3
3.6
V
Non-source power node
3.0
3.6
V
High-level input voltag ,
CTL0, CTL1, D0-D7
ISO = V
DD
, V
DD
>= 2.7 V
ISO = V
DD
, V
DD
>= 3.0 V
2.3
—
—
V
,
2.6
—
—
V
V
IH
High-level input voltage,
C/LKON
2
, PC0–PC2, ISO, PD
RESET
0.7 V
DD
—
—
V
0.6 V
DD
—
—
Low-level input voltage, LREQ,
CTL0, CTL1, D0–D7
Low-level input voltage, C/LKON
2
,
PC0–PC2, ISO, PD,
RESET
ISO = V
DD
—
—
0.7
V
V
IL
—
—
0.2 V
DD
V
—
—
0.3 V
DD
2.5
—
I
O
Output current
TPBIAS outputs
–6
—
mA
V
ID
Differential input voltag
amplitude
TPA, TPB cable inputs, during data reception
118
—
260
mV
TPA, TPB cable inputs, during data arbitration
168
—
265
mV
V
IC-100
TPB common mode input voltage
TPB common-mode input voltage
Speed signaling off
or S100 speed
or S100 s eed
signal
Source power node
1.165
—
2.515
V
Non-source power node
1.165
—
2.015
1
V
V
IC-200
TPB common mode input voltage
TPB common-mode input voltage
S200 speed signal
Source power node
0.935
—
2.515
2.015
1
V
Non-source power node
0.935
—
V
V
IC-400
TPB common mode input voltage
TPB common-mode input voltage
S400 speed signal
Source power node
0.523
—
2.515
2.015
1
V
Non-source power node
0.523
—
V
t
PU
Power-up reset time
Set by capacitor between RESET pin and GND
2
—
—
ms
TPA, TPB cable inputs, S100 operation
—
—
1.08
ns
Receive input jitter
TPA, TPB cable inputs, S200 operation
—
—
0.5
ns
TPA, TPB cable inputs, S400 operation
—
—
0.315
ns
Between TPA and TPB cable inputs, S100
operation
Between TPA and TPB cable inputs, S200
operation
Between TPA and TPB cable inputs, S400
operation
Crystal connected according to Figure 10 or
external clock input at pin XI
—
—
0.8
ns
Receive input skew
—
—
0.55
ns
—
—
0.5
ns
f
XTAL
Crystal or external clock
frequency
24.5735
24.576
24.5785
MHz
NOTES:
1. For a node that does not source power to the bus (see Section 4.2.2.2 in the IEEE 1394-1995 standard).
2. C/LKON is only an input when RESET = 0.
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