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參數(shù)資料
| 型號： | PCD6003 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital telephone answering machine chip |
| 中文描述： | 數(shù)字電話應答機芯片 |
| 文件頁數(shù)： | 18/96頁 |
| 文件大小： | 385K |
| 代理商： | PCD6003 |
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2001 Apr 17
18
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
Table 8 shows the DSP clock frequency settings. Setting
the DSP frequency to the correct value according to the
operation mode of the DSP is done by the Application
Programming Interface (API). Please refer to the API
specification for more details.
Table 9 shows CLK_3 selection (CKCON.6/CKCON.7
according to Fig.4). The selection depends on the type of
crystal which is connected (determined by RTC mode
setting according to Table 6). The setting of CKCON [6:7],
thus determines the selection of the CLK_3 source (see
Table 2 and Fig.4). If CKCON.7 = 0 to denote Emergency
mode - CLK_3 will be derived from the EMG_CLK, as
shown in the following tables.
The TICB provides two periodic outputs to the
microcontroller: FS_event and TIME_event. FS_event is
programmable to 4 different rates. Both outputs are
derived from and therefore synchronized to FS1. The
outputs are connected to an interrupt input of the
microcontroller and called ‘Time_event interrupt’ and
‘FS_event interrupt’ respectively. The selection of the
FS_event interrupt rate is done via the CKCON SFR, see
Section 9.2.4. Figure 8 shows the generation of these
interrupts. Table 10 shows the selection of the FS_event
rate. The FS1 clock is provided by the CDCCNTRL block
shown in Fig.4.
Table 8
DSP clock selection
Table 9
CODEC clock selection
Note
1.
A phase corrected CLK_3 clock is not available in Emergency mode (CKCON.7 = 0). For a CLK_3 phase correction
(CKCON.6 = 1), CLK_21 must be available.
Table 10
FS_event rate selection
CKCON.7
(EMG mode)
CKCON.5
(DSP clock 1)
CKCON.4
(DSP clock 0)
SYMOD.5
(PLL on/off)
DSP CLOCK
FREQUENCY
0
1
1
1
1
1
X
X
0
0
1
1
X
X
0
1
0
1
X
0
1
1
1
1
EMG_CLK
no clock active
CLK_1
CLK_7
CLK_42
CLK_28
CKCON.7
(EMG mode)
CKCON.6
(RTC mode)
CLK_3 SOURCE
0
1
1
X
1
0
EMG_CLK
(1)
CLK3_CORR
CLK3_OUT
CKCON.1
(FS_event 1)
CKCON.0
(FS_event 0)
FS_event INTERRUPT RATE
0
0
1
1
0
1
0
1
FS1/16
FS1/8
FS1/4
FS1
500 Hz
1 kHz
2 kHz
8 kHz
2 ms
1 ms
500
μ
s
125
μ
s
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