參數(shù)資料
型號(hào): PCD6003
廠商: NXP Semiconductors N.V.
英文描述: Digital telephone answering machine chip
中文描述: 數(shù)字電話應(yīng)答機(jī)芯片
文件頁數(shù): 72/96頁
文件大?。?/td> 385K
代理商: PCD6003
2001 Apr 17
72
Philips Semiconductors
Product specification
Digital telephone answering machine chip
PCD6003
16.1.3
G
ENERAL PURPOSE
DAC
The on-chip DAC is a single channel 8-bit converter. The control of this converter is done via the GPDAR register. The
value written in this register triggers the conversion which will be present at the output pin after the digital-to-analog
conversion cycle (<25
μ
s). The range from the digital-to-analog output is 0 to 2000 mV (V
REF
).
The conversion principle for both analog-to-digital and digital-to-analog conversion is shown in Fig.34.
16.1.3.1
General Purpose DAC Register (GPDAR)
Table 67
General Purpose DC A Register (SFR address C4H); reset state 80H
7
6
5
4
3
2
1
0
D/A.7
D/A.6
D/A.5
D/A.4
D/A.3
D/A.2
D/A.1
D/A.0
handbook, full pagewidth
MGM796
VACM
RDAC
VADC
AVS
AAD
SYMOD.4 (MIC supply bit)
VMIC
Vref
DAOUT
AD0IN
AD1IN
VREFR
DCA
GPADC
GPDAR
GPADR
GPADC
(channel
request bit)
VBGP
Fig.33 The architecture of the auxiliary DAC and ADC.
handbook, full pagewidth
MGM797
time
pin GPDAR
represents output
GPADC SFR
has been changed
by the microcontroller
GPADC SFR
has been changed
by the micro
HW resets request bit.
Conversion finished.
Result in GPADR SFR
conversion cycle (
<
30
μ
s)
analog-to-digital conversion
conversion cycle (
<
10
μ
s)
digital-to-analog conversion
Fig.34 Analog-to-digital and digital-to-analog conversion principle.
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