
2001 Microchip Technology Inc.
DS30292C-page 203
PIC16F87X
PORTE
........................................................................... 9
,
17
Analog Port Pins
...............................................9
,
36
,
38
Associated Registers
.................................................36
Block Diagram
............................................................36
Input Buffer Full Status (IBF Bit)
................................37
Input Buffer Overflow (IBOV Bit)
................................37
Output Buffer Full Status (OBF Bit)
............................37
PORTE Register
.................................................. 15
,
36
PSP Mode Select (PSPMODE Bit)
...........35
,
36
,
37
,
38
RE0/RD/AN5 Pin
...............................................9
,
36
,
38
RE1/WR/AN6 Pin
..............................................9
,
36
,
38
RE2/CS/AN7 Pin
...............................................9
,
36
,
38
TRISE Register
..........................................................36
Postscaler, WDT
Assignment (PSA Bit)
................................................19
Rate Select (PS2:PS0 Bits)
.......................................19
Power-down Mode.
See
SLEEP
Power-on Reset (POR)
.....................119
,
123
,
124
,
125
,
126
Oscillator Start-up Timer (OST)
....................... 119
,
124
POR Status (POR Bit)
................................................25
Power Control (PCON) Register
..............................124
Power-down (PD Bit)
......................................... 18
,
123
Power-up Timer (PWRT)
................................. 119
,
124
Time-out (TO Bit)
............................................... 18
,
123
Time-out Sequence on Power-up
.................... 127
,
128
PR2 Register
................................................................ 16
,
55
Prescaler, Timer0
Assignment (PSA Bit)
................................................19
Rate Select (PS2:PS0 Bits)
.......................................19
PRO MATE II Universal Device Programmer
..................145
Program Counter
RESET Conditions
...................................................125
Program Memory
...............................................................11
Interrupt Vector
..........................................................11
Paging
.................................................................. 11
,
26
Program Memory Map
...............................................11
RESET Vector
............................................................11
Program Verification
.........................................................133
Programming Pin (V
PP
)
.................................................... 7
,
8
Programming, Device Instructions
...................................135
PSP.
See
Parallel Slave Port.
............................................38
Pulse Width Modulation.
See
Capture/Compare/PWM,
PWM Mode.
PUSH
.................................................................................26
R
R/W
....................................................................................66
R/W bit
...............................................................................74
R/W bit
...............................................................................74
RAM.
See
Data Memory
RCREG
..............................................................................17
RCSTA Register
........................................................... 17
,
96
ADDEN Bit
.................................................................96
CREN Bit
....................................................................96
FERR Bit
....................................................................96
OERR Bit
...................................................................96
RX9 Bit
.......................................................................96
RX9D Bit
....................................................................96
SPEN Bit
.............................................................. 95
,
96
SREN Bit
....................................................................96
Read/Write bit, R/W
...........................................................66
Reader Response
............................................................208
Receive Enable bit
.............................................................68
Receive Overflow Indicator bit, SSPOV
.............................67
Register File
.......................................................................12
Register File Map
......................................................... 13
,
14
Registers
ADCON0 (A/D Control 0)
......................................... 111
ADCON1 (A/D Control 1)
......................................... 112
CCP1CON (CCP Control 1)
....................................... 58
EECON2
.................................................................... 41
FSR
........................................................................... 27
INTCON
..................................................................... 20
OPTION_REG
......................................................19
,
48
PCON (Power Control)
.............................................. 25
PIE1 (Peripheral Interrupt Enable 1)
.......................... 21
PIE2 (Peripheral Interrupt Enable 2)
.......................... 23
PIR1 (Peripheral Interrupt Request 1)
....................... 22
PIR2 (Peripheral Interrupt Request 2)
....................... 24
RCSTA (Receive Status and Control)
....................... 96
Special Function, Summary
....................................... 15
SSPCON2 (Sync Serial Port Control 2)
..................... 68
STATUS
.................................................................... 18
T1CON (Timer1 Control)
........................................... 51
T2CON (Timer 2 Control)
Timer2
T2CON Register
........................................ 55
TRISE
........................................................................ 37
TXSTA (Transmit Status and Control)
....................... 95
Repeated START Condition Enable bit
............................. 68
RESET
......................................................................119
,
123
Block Diagram
......................................................... 123
MCLR Reset.
See
MCLR
RESET
Brown-out Reset (BOR).
See
Brown-out Reset (BOR)
Power-on Reset (POR).
See
Power-on Reset (POR)
RESET Conditions for PCON Register
.................... 125
RESET Conditions for Program Counter
................. 125
RESET Conditions for STATUS Register
................ 125
WDT Reset.
See
Watchdog Timer (WDT)
Revision History
............................................................... 197
S
S (START bit)
.................................................................... 66
Sales and Support
........................................................... 209
SCI.
See
USART
SCK
................................................................................... 69
SCL
.................................................................................... 74
SDA
................................................................................... 74
SDI
..................................................................................... 69
SDO
................................................................................... 69
Serial Clock, SCK
.............................................................. 69
Serial Clock, SCL
............................................................... 74
Serial Communication Interface.
See
USART
Serial Data Address, SDA
................................................. 74
Serial Data In, SDI
............................................................. 69
Serial Data Out, SDO
........................................................ 69
Slave Select, SS
................................................................ 69
SLEEP
..............................................................119
,
123
,
132
SMP
................................................................................... 66
Software Simulator (MPLAB SIM)
................................... 144
SPBRG Register
................................................................ 16
Special Features of the CPU
........................................... 119
Special Function Registers
................................................ 15
Special Function Registers (SFRs)
.................................... 15
Data EEPROM and FLASH Program Memory
.......... 41
Speed, Operating
................................................................. 1