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參數(shù)資料
| 型號： | P16F877 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | DMOS MICROSTEPPING DRVR W/TRANSLATOR |
| 中文描述： | 28/40-Pin 8位CMOS閃存微控制器 |
| 文件頁數(shù)： | 201/218頁 |
| 文件大?。?/td> | 3824K |
| 代理商： | P16F877 |
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2001 Microchip Technology Inc.
DS30292C-page 199
PIC16F87X
INDEX
A
A/D
...................................................................................111
Acquisition Requirements
........................................114
ADCON0 Register
....................................................111
ADCON1 Register
....................................................112
ADIF bit
....................................................................112
Analog Input Model Block Diagram
..........................114
Analog Port Pins
.......................................7
,
8
,
9
,
36
,
38
Associated Registers and Bits
.................................117
Block Diagram
..........................................................113
Calculating Acquisition Time
....................................114
Configuring Analog Port Pins
...................................115
Configuring the Interrupt
..........................................113
Configuring the Module
............................................113
Conversion Clock
.....................................................115
Conversions
.............................................................116
Delays
......................................................................114
Effects of a RESET
..................................................117
GO/DONE bit
...........................................................112
Internal Sampling Switch (Rss) Impedence
.............114
Operation During SLEEP
.........................................117
Result Registers
.......................................................116
Sampling Requirements
...........................................114
Source Impedence
...................................................114
Time Delays
.............................................................114
Absolute Maximum Ratings
.............................................149
ACK
....................................................................................74
Acknowledge Data bit
........................................................68
Acknowledge Pulse
............................................................74
Acknowledge Sequence Enable bit
....................................68
Acknowledge Status bit
......................................................68
ADRES Register
........................................................ 15
,
111
Analog Port Pins.
See
A/D
Analog-to-Digital Converter.
See
A/D
Application Notes
AN552 (Implementing Wake-up on Key Strokes
Using PIC16CXXX)
....................................31
AN556 (Implementing a Table Read)
........................26
AN578 (Use of the SSP Module in the I2C
Multi-Master Environment)
.........................73
Architecture
PIC16F873/PIC16F876 Block Diagram
.......................5
PIC16F874/PIC16F877 Block Diagram
.......................6
Assembler
MPASM Assembler
..................................................143
B
Banking, Data Memory
................................................. 12
,
18
Baud Rate Generator
.........................................................79
BCLIF
.................................................................................24
BF
............................................................................74
,
82
,
84
Block Diagrams
A/D
...........................................................................113
A/D Converter
..........................................................113
Analog Input Model
..................................................114
Baud Rate Generator
.................................................79
Capture Mode
............................................................59
Compare Mode
..........................................................60
I
2
C Master Mode
........................................................78
I
2
C Module
.................................................................73
I
2
C Slave Mode
..........................................................73
Interrupt Logic
..........................................................129
PIC16F873/PIC16F876
................................................5
PIC16F874/PIC16F877
............................................... 6
PORTA
RA3:RA0 and RA5 Pins
..................................... 29
RA4/T0CKI Pin
.................................................. 29
PORTB
RB3:RB0 Port Pins
............................................ 31
RB7:RB4 Port Pins
............................................ 31
PORTC
Peripheral Output Override (RC 0:2, 5:7)
.......... 33
Peripheral Output Override (RC 3:4)
................. 33
PORTD
...................................................................... 35
PORTD and PORTE (Parallel Slave Port)
................. 38
PORTE
...................................................................... 36
PWM Mode
................................................................ 61
RESET Circuit
.......................................................... 123
SSP (I
2
C Mode)
......................................................... 73
SSP (SPI Mode)
........................................................ 69
Timer0/WDT Prescaler
.............................................. 47
Timer1
....................................................................... 52
Timer2
....................................................................... 55
USART Asynchronous Receive
............................... 101
USART Asynchronous Receive (9-bit Mode)
.......... 103
USART Transmit
........................................................ 99
Watchdog Timer
...................................................... 131
BOR.
See
Brown-out Reset
BRG
................................................................................... 79
BRGH bit
............................................................................ 97
Brown-out Reset (BOR)
............................119
,
123
,
125
,
126
BOR Status (BOR Bit)
............................................... 25
Buffer Full bit, BF
............................................................... 74
Bus Arbitration
................................................................... 89
Bus Collision Section
......................................................... 89
Bus Collision During a Repeated START Condition
.......... 92
Bus Collision During a START Condition
.......................... 90
Bus Collision During a STOP Condition
............................ 93
Bus Collision Interrupt Flag bit, BCLIF
............................... 24
C
Capture/Compare/PWM (CCP)
......................................... 57
Associated Registers
Capture, Compare and Timer1
.......................... 62
PWM and Timer2
............................................... 63
Capture Mode
............................................................ 59
Block Diagram
................................................... 59
CCP1CON Register
........................................... 58
CCP1IF
.............................................................. 59
Prescaler
........................................................... 59
CCP Timer Resources
............................................... 57
CCP1
RC2/CCP1 Pin
..................................................7
,
9
CCP2
RC1/T1OSI/CCP2 Pin
......................................7
,
9
Compare
Special Trigger Output of CCP1
........................ 60
Special Trigger Output of CCP2
........................ 60
Compare Mode
.......................................................... 60
Block Diagram
................................................... 60
Software Interrupt Mode
.................................... 60
Special Event Trigger
........................................ 60
Interaction of Two CCP Modules (table)
.................... 57
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