參數(shù)資料
型號(hào)： MT9076
廠商： Mitel Networks Corporation
英文描述： T1/E1/J1 3.3V Single Chip Transceiver
中文描述： T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器
文件頁(yè)數(shù)： 82/160頁(yè)
文件大?。?/td> 416K
代理商： MT9076
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MT9076
Preliminary Information
78
Bit
Name
Functional Description
7
LLOS
LIU Loss of Signal indication
. This bit will be high when the received signal is less than 40
dB below the nominal value for a period of at least 1 msec. This bit will be low for normal
operation.
6-0
- - -
Unused
Table 57 - Receive Signal Status Word
(Page 3, Address 16H) (T1)
Bit
Name
Functional Description
7
TSLIP
Transmit Slip
. A change of state (i.e., 1-to-0 or 0-to-1) indicates that a transmit controlled
frame slip has occurred.
6
TSLPD
Transmit Slip Direction.
If one, indicates that the last transmit frame slip resulted in a
repeated frame, i.e., the internally generated 1.544 Mhz. transmit clock is faster than the
system clock (C4b). If zero, indicates that the last transmit frame slip resulted in a lost frame,
i.e., the internally generated 1.544 Mhz. transmit clock is slower than network clock. Updated
on an TSLIP occurance basis.
5
TxSBMSB
Transmit Slip Buffer MSB
. The most significant bit of the phase status word. If one, the
delay through the transmit elastic buffer is greater than one frame in length; if zero, the delay
through the receive elastic buffer is less than one frame in length. This bit is reset whenever
page 3 address 17H - Transmit Slip Buffer Delay - is written to.
4 - 0
- - -
Unused
.
Table 58 - MSB Transmit Slip Buffer
(Page 3, Address 17H) (T1)
Bit
Name
Functional Description
7 - 3
TxTS4 - 0
Transmit Time Slot
. A five bit counter that indicates the number of STBUS time slots
between the transmit elastic buffer STBUS write frame boundary and the internal transmit
read frame boundary. The count is updated every 250 uS.
2 - 0
TxBC2 - 0
Transmit Bit Count
. A three bit counter that indicates the number of STBUS bit times
there are between the transmit elastic buffer STBUS write frame boundary and the internal
read frame boundary. The count is updated every 250 uS.
Table 59 - Transmit Slip Buffer Delay
(Page 3, Address 18H) (T1)
Bit
Name
Functional Description
7 - 0
AP7 - 0
Analog Peak
. This status register gives the output value of an 8 bit A/D converter
connected to a peak detector on RTIP/RRING.
Table 60 - Analog Peak Detect
(Page 3, Address 1DH) (T1)
相關(guān)PDF資料
PDF描述
MT9076AB T1/E1/J1 3.3V Single Chip Transceiver
MT9076 T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器)
MT9079 Advanced Controller for E1(先進(jìn)的E1幀調(diào)節(jié)器和控制器)
MT9080B SMX - Switch Matrix Module(用于消費(fèi)類(lèi)轉(zhuǎn)換應(yīng)用的開(kāi)關(guān)矩陣模塊)
MT90810 Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9076AB 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver
MT9076AP 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver
MT9076B 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver
MT9076BB 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays
MT9076BB1 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays
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